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“Planning for Dry Run: material for discussion” Gianluca Lamanna (CERN) TDAQ meeting 23.05.2012.

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Presentation on theme: "“Planning for Dry Run: material for discussion” Gianluca Lamanna (CERN) TDAQ meeting 23.05.2012."— Presentation transcript:

1 “Planning for Dry Run: material for discussion” Gianluca Lamanna (CERN) TDAQ meeting 23.05.2012

2 When? dry run 15 of JulyThe dry run will start the 15 of July: available by this date –All the people involved should be available by this date Analysis week –Overlap with the Analysis week fibers & cabling –Possible delay in the installation of fibers & cabling infrastructure dry run 15 of AugustThe dry run will finish the 15 of August: –The subsystems people are kindly request to be available until August 15 actualDry Run egin of the technical Run –The actual Dry Run will finish with the begin of the technical Run (October).

3 2012 layout NA62 / 2012 Layout LKr SLM readout + CREAM Prototype ? MUV 2+3 ½ Straw Chamber CHANTI Prototype 8 LAV, 3 with Readout CEDAR ≈50% equipped Temp. Beam Pipe CHOD SAC CEDAR (no KTAG), CHANTI, LAV, CHOD, LKr, MUV2/3, SAC/IRC; STRAW as “Observer” end of June delay Most of the support infrastructure (fibers, network, control room, pc farm room, …) will be ready at the end of June… with some possible delay

4 What is provided? readout rackMost of the infrastructure up to the readout rack (LTU, TTCex, clock fiber, switch, choke & error cables, TEL62 server, gigabit fiber to the router, patch panels…) but subdetector responsibilityCrates, TEL62, TDCB, LAVFEE & Cables will be provided according to your request, but, after test and validation, they are placed under subdetector responsibility (in any case the experts will be around for the whole dry run) Cabling from TEL62 to patch panel and switch should be provided by the subdetector (for instance: CCPC ethernet cables, data ethernet cables, Choke/error cables,…) Think what you need and ask in case of doubt!

5 Readout program TTC clock and trigger TEL62 r/o fw TDCB fw L0TP Control Program CCPC server Framework for event display CDR Sub-detector system (FEE, TEL62, Crates, TDCB, cables, …)

6 TimelineSetup Trigger test Synchronization Pulser test Control lines test Trigger primitive test Infrastructure test Additional tests July 15 August 15 Technical run Lab tests and pre-installation

7 Setup Electronics commissioningElectronics commissioning: –FEE setup and tests (thresholds, noise, …) –Standalone test: Ancillary monitor systems in TEL62 Local sniffer, simplified version of readout program NetworkNetwork test –The TEL62 send packets on the network (auto-trigger) ClockClock installation and test FarmFarm installation and test LKr LKr –Test of the SLM readout –The SLMs send packet to the PCFARM TALKThe TALK board produces and receives triggers (self test)

8 Electronics # channels (in 2012) FEER/O CEDAR128 16 (dr)CEDAR boardTDCB+TEL62 CHANTI46 4 (dr)Chanti board + LAV FEE TDCB+TEL62 LAV480LAV FEETDCB+TEL62 STRAW~1800Cover Board + SRB TEL62 CHOD128LAV FEETDCB+TEL62 LKR~5000CPD+SLMPCs MUV288LAV FEETDCB+TEL62 MUV3<296CFD+TRAMTDCB+TEL62 IRC/SAC8LAV FEETDCB+TEL62

9 Electronics inventory DetectorLAVFEE CHANTI2 LAV15 CHOD4 MUV29 SAC/IRC1 Detector# chTDCB CEDAR1281 CHANTI461 LAV4809 CHOD1282 MUV1/2264(88)2 MUV32963 SAC/IRC41 DetectorTEL62 CEDAR1 CHANTI1 LAV3 STRAW1 CHOD1 LKR/L03 MUV1/21 MUV31 SAC/IRC1

10 Trigger test LTUsTTCLTUs and TTC messages test Trigger transmission: TALK –The TALK board sends triggers requests TEL62s “End of Burst” –The TEL62s count the triggers and provide the total number of trigger at the special trigger “End of Burst” TALK-TAXITest of TALK-TAXI trigger distribution LTUstandaloneLTU test in standalone mode PP SL TTC TAXI TALK FPGA To CPD to R/O PC TEL62

11 Synchronization test Start of burst & End of BurstStart of burst & End of Burst TEL62 –Test of SOB & EOB signals transmission to the TEL62 PCFARM –Test of SOB & EOB to PCFARM SynchroSynchro system test: TALK board –The TALK board sends a special “synchro” trigger TEL62s –The TEL62s send a packet with the timestamp offset TEL62 –The offset (theoretically = 0) for each TEL62 is computed offset CPDMeasure of the offset of the timestamp distributed to the CPD and the trigger timestamp L0TP TTC TEL62

12 Fine time synchronization fine time Dry RunThe fine time synchronization can’t be done in the Dry Run technical runSet up everything is needed for the technical run Think the strategy for time synchro procedure and monitoring det1det2 FEE TDC  T 1,0  T 1,1  T 2,0  T 2,1  T tof

13 Pulser test TDCB problemMUV3At predefined timestamps the TDCB will send a pulse on the last TDC- cable pair (problem with MUV3) TALK 1ms –The TALK board will ask for this event 1ms later reconstruction & event display –Test of reconstruction & event display sub-detectors –Specific test for sub-detectors LKr calibration: TALK board –Test of the TALK board LKr calibration system Pulser TDCB TTC Data TEL62 TALK Cedar NINO Board 1 ms 0xC1A0C1A0 time TEL62 Detector TALK Pulse at Trigger at

14 Control lines test choke & errorTest of choke & error –TEL62 –TEL62 generate (fake) choke and error TALK choke/error –The TALK board stops the triggers, sends special trigger choke/error on, waits for choke/error off, etc etc LTU –Test of the LTU counters CHEF –Test of the CHEF board TEL62choke/error EOB –The TEL62 provide a summary of choke/error in the EOB

15 Control lines test

16 Trigger decision test TALK boardTest the TALK board capability to generate trigger decisions: LEMO –Fake internal primitives generated by LEMO signals (problem with MUV3) real primitives –Trigger based on real primitives coming through ethernet –Offline –Offline reconstruction of the trigger decision (min bias)

17 Additional test GPUGPU CDRCDR in critical conditions (buffering, high bandwidth (<1 Gb/s), …) NetworkNetwork high rate capability PC FarmPC Farm high rate with L1 “fake” algorithms TDC synchronizationPreparation of the procedure for TDC synchronization during the technical run …

18 Infrastructure test Network, TTC fibers, Choke&Error physical structure, Control Program, Readout software, CCPC server, Event display, CDR, … Two phases: –Commissioning Beforedry runBefore the dry run (if it’s possible) –PC Farm, Control Program, CCPC server,… –Characterization dry runDuring the dry run

19 Common systems people TEL62, TDCBTEL62, TDCB: Marco, Bruno, Stefano, Franco, Elena, … LAV FEELAV FEE: Mauro R., Francesco G.,… PC Farm SW & HWPC Farm SW & HW: Jonas, Paolo TTC & LTUTTC & LTU: Marian, Roman, Vlado,… TALKTALK: Riccardo, Gianluca, Dominique Control ProgramControl Program: Nicolas NetworkNetwork: Riccardo, Alberto,Gianluca,… CDRCDR: ???

20 Conclusions TEL62TALK FWThe success of most of the tests depends critically on the TEL62 and TALK FW: TEL62critical condition –The TEL62 firmware is still in critical condition in some part TALKmissed –In the TALK firmware some (small) part is still missed –Pisa and CERN will work deeply in the next month to guarantee a minimum set of “features” in both side NetworkPC Farm data acquisition technical runNetwork and PC Farm tests are essential to prepare data acquisition for the technical run whole electronics chain technical runThe commissioning and the test of the whole electronics chain for every sub-detectors is very important to ensure an effective data taking in the technical run. Control program, CCPC server, framework for event display, CDR,… dry runThe prototypes of all the ancillary systems (Control program, CCPC server, framework for event display, CDR,…) will be tested during the dry run.


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