Presentation is loading. Please wait.

Presentation is loading. Please wait.

Peter-Bernd Otte - 8 th March 2010 CB collaboration meeting, Mainz.

Similar presentations


Presentation on theme: "Peter-Bernd Otte - 8 th March 2010 CB collaboration meeting, Mainz."— Presentation transcript:

1 Peter-Bernd Otte - 8 th March 2010 CB collaboration meeting, Mainz

2 today@DPG 1. New Moeller electronics 2. Status of new trigger2. cellular cluster counter (see Edinburgh talk)

3  What for? ◦ Measure: beam polarity ◦ Constituents: tagger, Moeller radiator, electronics ◦ essential information for many experiments  Why built it new from scratch? ◦ faster

4  Used parts: ◦ Splitter ◦ Trigger ◦ TDC (8x) ◦ Readout of data  Realised on one FPGA (VUPROM) card ◦ One VME CPU to read histograms after measurement  Time to save an event: 20ns  Lifetime @ 2nA ◦ 99,999% (with gate) ◦ 99% (without Gate)

5 output input clock logic cell („modules“): programmable switches Interconnection (“cables”):  “has” 1000’s of “modules” and “cables”  ~300 I/O signals  configuration via software  behaviour of cells and interconnection  Not a CPU!  Can act as: logic, scaler, TDC, …

6  New electronic cards arrived (10 cards)  „VUPROM 2“ from GSI ◦ FPGA: „Virtex 4“ from Xilinx ◦ 224 inputs, 32 outputs, LVDS ◦ VMEbus connectivity ◦ cheap: 2k€ apiece

7  TDC programed in FPGA: ◦ RMS=30ps  Make use of propagation time trough smallest entities inside FPGA start end  How are these TDCs read out?

8  “Measure”-FSM 1.Wait for 1 st hit 2.Wait for 2 nd hit 3.Compute time differences and save temporally 2 Finite state machines (FSM): (“Acqu Root on FPGA”)  “Store”-FSM 1.Read RAM 2.Increase Value by 1 3.Write RAM Each step needs 20ns FSMs run in parallel  Add more channels without loosing lifetime One FSM per TDC and per histogram

9  Detailed view of FPGA 1.8k cells used (9%) in out

10 OldNew readout time20 µs20ns lifetime~50%> 95% size1 VME module

11  measured yesterday:  beam current: 5nA, 30min  count asymmetry: ◦ P foil not clear yet N+ N-

12  improve calibration ◦ eliminate ripples arising from binning  connect more channels ◦ Better statistics (@ constant lifetime!)

13 Possible triggers Status of hardware

14  Planned so far: ◦ Improved cluster counter (cellular automata logic) ◦ Coplanarity ◦ in conjunction with PID:  differentiate charged/uncharged particles for above triggers ◦ Single Tagger signals for detector tests  Include (all) detectors...

15  Possible to include all detectors ◦ All CB crystals (672x  720 cable pairs) ◦ All PID stripes (24x) ◦ Tagger channels (352x) ◦ Endpoint Tagger (~64x) ◦ TOF-Panels ◦ Inner TAPS crystals (72x) ◦ TAPS crystals and vetos (384x)

16  TAPS electronics has output of all CFD  Trigger modules are available

17  Moeller electronics working ◦ New technique, 10 6 faster  Trigger ◦ Enough inputs: feasible to include signals from all detectors ◦ Coming weeks: Installation of new trigger electronics  in parallel to existing ◦ Help to include TAPS needed

18 Thank you for your attention


Download ppt "Peter-Bernd Otte - 8 th March 2010 CB collaboration meeting, Mainz."

Similar presentations


Ads by Google