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Josh Ruggiero CSE 420 – April 23 rd 2007.  MCH – Memory Controller Hub  Bridges connection from CPU to RAM and Video Bus (AGP/PCI-X)  Connects to South.

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Presentation on theme: "Josh Ruggiero CSE 420 – April 23 rd 2007.  MCH – Memory Controller Hub  Bridges connection from CPU to RAM and Video Bus (AGP/PCI-X)  Connects to South."— Presentation transcript:

1 Josh Ruggiero CSE 420 – April 23 rd 2007

2  MCH – Memory Controller Hub  Bridges connection from CPU to RAM and Video Bus (AGP/PCI-X)  Connects to South Bridge  A Northbridge with integrated video is called a GMCH – Graphics and Memory Controller Hub

3  ICH – I/O Controller Hub  Bridge connection from Memory Controller Hub to slower devices like USB devices, PCI-X, IDE(SATA/PATA), Real Time Clock, BIOS, onboard sound and more

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6  Originally codenamed Broadwater  Set out to be the first chipset to support Core 2 Duo processors  Coupled with ICH8 to provide next generation I/O support  Supports 533/800/1066 FSB  Next generation of Intel Integrated Graphics

7  Features ◦ 6 Serial ATA ports ◦ PCI Express ◦ Intel High Definition Audio ◦ 10 USB ports ◦ BIOS loaded on SPI or FWH ◦ Integrated Gigabit Ethernet

8  http://download.intel.com/design/chipsets/d atashts/31305302.pdf http://download.intel.com/design/chipsets/d atashts/31305302.pdf  http://en.wikipedia.org/wiki/Southbridge_%2 8computing%29 http://en.wikipedia.org/wiki/Southbridge_%2 8computing%29  http://en.wikipedia.org/wiki/Northbridge http://en.wikipedia.org/wiki/Northbridge  http://download.intel.com/design/chipsets/d atashts/31305602.pdf http://download.intel.com/design/chipsets/d atashts/31305602.pdf


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