1. GigaTracker Working Group meeting Status of the GTK_carrier 2015 24/03/2015

2. GTK_carrier 2015: 2 proposals 1.Thinner countersink 2.Stairway to bonding area Summary 24/03/2015GigaTracker Working Group meeting M.Morel 2

3. 24/03/2015GigaTracker Working Group meeting M.Morel 3 Top Layer40µm Solder mask Top Isola55µm GND115µm Stripline115µm Isola160µm Isola55µm GND215µm Isola160µm Power supply130µm Isola55µm 600µm GTK_carrier 2015 cross section 14 Layers PCB Power supply230µm Isola55µm Power supply330µm Isola160µm Power supply430µm Isola160µm GND330µm Power supply530µm Isola160µm GND430µm Isola160µm Stripline215µm Isola160µm GND515µm Isola55µm Bottom Layer25µm Solder mask Bottom Isola160µm Cu Isola 408HR Coverlay 1400µm Countersink area 14.5mm 5 x GND layers 5 x PS layers 4 x signals layers GNDVDDA VDD Sig2 Sig1 PCB Micro-cooling plate sensor TDCpix Frame

4. 24/03/2015GigaTracker Working Group meeting M.Morel 4 GTK_carrier SOMACIS production 2014 GND Top layer is cut down to 200µm

5. Top Layer40µm Solder mask Top Isola55µm GND115µm Stripline115µm Isola160µm Isola55µm GND215µm Isola160µm Power supply130µm Isola55µm 85µm GTK_carrier 2015 cross section 14 Layers PCB Power supply230µm Isola55µm Power supply330µm Isola160µm Power supply430µm Isola160µm GND330µm Power supply530µm Isola160µm GND430µm Isola160µm Stripline215µm Isola160µm GND515µm Isola55µm Bottom Layer25µm Solder mask Bottom Isola160µm Cu Isola 408HR Coverlay 1400µm Countersink area 5 x GND layers 5 x PS layers 4 x signals layers GND VDDA VDD Sig3 Sig2 24/03/2015GigaTracker Working Group meeting M.Morel 5 Sig1 70µm 445µm

6. GTK_carrier 2015 equipped with the cooling plate and the detector view 380µm Cooling plate version 2015 24/03/2015 GigaTracker Working Group meeting M.Morel 6 Stiffener

7. 24/03/2015GigaTracker Working Group meeting M.Morel 7 Layout modified on TDCpix #0

8. 24/03/2015 GigaTracker Working Group meeting M.Morel 8

9. 24/03/2015GigaTracker Working Group meeting M.Morel 9 GTK_carrier 2015

10. 24/03/2015GigaTracker Working Group meeting M.Morel 10 The stack up of the GTK_carrier 2015 will be more symmetric so we expect improvement in the flatness. In order to solve the problem of the startup of PLL, we added 560µF/2.5V Polymer Aluminium capacitors close to the TDCpix and 5600µF/6V3 Electrolytic Aluminium capacitors in the portion located inside the vessel. The mode_block_mux of each TDCpix is now selectable by the I²C bus. An optical reset is now available. The thickness of the countersink could be reduced to 600µm. The connections to Power Supplies and GND planes could be operate on a stairway created along the bonding area. These possibilities need to be confirm: - By PH/DT’s team - By The manufacturer of printed circuit board SOMACIS in March 31. Summary