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1 Copyright (c) 2003 by Valery Sklyarov and Iouliia Skliarova: DETUA, IEETA, Aveiro University, Portugal.

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Presentation on theme: "1 Copyright (c) 2003 by Valery Sklyarov and Iouliia Skliarova: DETUA, IEETA, Aveiro University, Portugal."— Presentation transcript:

1 1 Copyright (c) 2003 by Valery Sklyarov and Iouliia Skliarova: DETUA, IEETA, Aveiro University, Portugal

2 2 EA KIT240-7 (Electronic Assembly) Available: EA KIT 240-7. Control panel with fonts, graphic commands and macros. Electronic Assembly, 2002: http://www.lcd-module.de 240 128 Pixels RS232 begins majority of commands (ASCII code 1B 16 ) the code of command (ASCII code 57 16 ) Draws a straight line from the last end point to the point with coordinates (x1,y1) last end point x1 y1

3 3 rs_control provides the selected baud rate

4 4 subtype word10 is std_logic_vector (8 downto 1); type serial_pac is array (0 to 8) of word10; constant line_RS : serial_pac := ( x"1B", --delete display x"44", --delete display x"4C", --delete display x"1B", --draw line (ESC) x"47", --draw line (code of this operation) x"30",-- x1 left point x"15",-- y1 upper point x"E6",-- x2 right point x"72");-- y2 bottom point the first command the second command 00011011 2

5 5 subtype word10 is std_logic_vector (8 downto 1); type serial_pac is array (0 to 8) of word10; constant line_RS : serial_pac := (x"1B", x"44", x"4C", x"1B", x"47", x"30", x"15", x"E6", x"72"); “00011011” start bit stop bit 8 data bits 1 2 3 45 6 7 8 lclk if rising_edge(lclk) then RS232out <= line_RS(ind)(tmp); RS232in RS232out 80 81 Begins any instruction x"1B" 00011011

6 6 case tmp is when 0 => my_out <= '0'; tmp := tmp + 1; when 1 to 8 => my_out <= line_RS(ind)(tmp); tmp := tmp + 1; when 9 => my_out <= '1'; tmp := tmp + 1; when 10 => tmp := 0; ind := ind + 1; when others => tmp := 0; end case; RS232in RS232out 8 data bits start bit stop bit case tmp is when 0 => my_out <= '0'; tmp := tmp + 1; when 1 to 8 => my_out <= line_RS(ind)(tmp); tmp := tmp + 1; when 9 => my_out <= '1'; tmp := tmp + 1; when 10 to 1500 => tmp := tmp + 1; my_out <= '1'; when 1501 => tmp := 0; ind := ind + 1; when others => tmp := 0; end case; RS232out <= my_out; because LCD panel works slow

7 7 RS232in RS232out process(clk, rst) variable tmp, ind: integer; begin if rst= '1' then tmp:=0; ind :=0; elsif falling_edge(clk) then if rs232in = '0' then ind := 1; end if; if (tmp >= 1) then if (tmp <= 8) then LCD_symbol(tmp-1) <= rs232in; end if; if ind = 1 then tmp := tmp + 1; end if; if (tmp >= 9) and (rs232in = '1') then tmp := 0; ind := 0; end if; result <= LCD_symbol; end process; 8 data bits waiting for start bit receiving data bits waiting for stop bit received_ASCII

8 8 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; use ieee.numeric_std.all; entity RS_control is Port (clk: in std_logic; rst: in std_logic; rin : instd_logic_vector(7 downto 0); result: outstd_logic_vector(7 downto 0); rs232in: in std_logic; rs232out: out std_logic); end RS_control; baud rate for the considered example is 115 200 reset received_ASCII result from touch panel

9 9 architecture Behavioral of RS_control is subtype word10 is std_logic_vector (8 downto 1); type serial_pac is array (0 to 8) of word10; constant line_RS : serial_pac := ( x"1B", --delete display x"44", --delete display x"4C", --delete display x"1B", --draw line (ESC) x"47", --draw line (code of this operation) x"30",-- x1 left point x"15",-- y1 upper point x"E6",-- x2 right point x"72");-- y2 bottom point signal LCD_symbol : std_logic_vector (7 downto 0); signal my_out : std_logic;

10 10 begin process(clk, rst) variable tmp: integer; variable ind : integer; begin if rst= '1' then tmp:=0; ind := 0; my_out <= '1'; elsif rising_edge(clk) then if ind <= 8 then case tmp is when 0 => my_out <= '0';tmp := tmp + 1; when 1 to 8 =>my_out <= line_RS(ind)(tmp); tmp := tmp + 1; when 9 => my_out <= '1';tmp := tmp + 1; when 10 to 1500 => tmp := tmp + 1; my_out <= '1'; when 1501 => tmp := 0; ind := ind + 1; when others => tmp := 0; end case; end if; RS232out <= my_out; end process;

11 11 process(clk, rst) variable tmp: integer; variable ind: integer; begin if rst= '1' then tmp:=0; ind :=0; elsif falling_edge(clk) then if rs232in = '0' then ind := 1; end if; if (tmp >= 1) then if (tmp <= 8) then LCD_symbol(tmp-1) <= rs232in; end if; if ind = 1 then tmp := tmp + 1; end if; if (tmp >= 9) and (rs232in = '1') then tmp := 0; ind := 0; end if; result <= LCD_symbol; end process; end Behavioral;

12 12 architecture Behavioral of RS_control is subtype test8 is std_logic_vector (7 downto 0); type test is array (7 downto 0) of test8; signal my_test : test; subtype word10 is std_logic_vector (8 downto 1); type serial_pac is array (0 to 8) of word10; constant line_RS : serial_pac := ( “00011011", --delete display “01000100", --delete display “01001100", --delete display “00011011", --draw line (ESC) “01000111", --draw line (code of this operation) “00110000",-- x1 left point “00010101",-- y1 upper point “11100110",-- x2 right point “01110010");-- y2 bottom point signal LCD_symbol : std_logic_vector (7 downto 0); signal my_out : std_logic; --...........................

13 13 1 23 4

14 14 0110110001 start bit 01 10110001 8 data bits 1B stop bit subtype word10 is std_logic_vector (8 downto 1); type serial_pac is array (0 to 8) of word10; constant line_RS : serial_pac := ( “00011011", --delete display “01000100", --delete display “01001100", --delete display -- ………………………………

15 15

16 16 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; entity RS_divider is Port (clk48: in std_logic; rst: in std_logic; clockRS: out std_logic); end RS_divider; architecture Behavioral of RS_divider is signal lclk : std_logic; begin process(clk48, rst) variable temp: integer; begin if rst= '1' then temp:=0; lclk <= '0'; elsif rising_edge(clk48) then temp := temp + 1; if temp = 208 then lclk <= '1'; elsif temp > 417 or temp < 0 then lclk <= '0'; temp:=0; end if; end process; clockRS <= lclk; end Behavioral; 48 MHZ baud rate 115 200

17 17 Crossing was done inside the board 4 3 6 2 7 RTS 5 CTS RS232/J3 (10 pins) RS232/9 pins grouund 5 10 ground User constraints NET "rs232out" LOC = "c12"; NET "rs232in" LOC = "b13";

18 18 Mode 1 (automatically) Mode 2 (dependently on switch)

19 19 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; use ieee.numeric_std.all; entity RS_control is-- see slide 8 Port (clk: in std_logic; rst: in std_logic; rin : instd_logic_vector(7 downto 0); result: outstd_logic_vector(7 downto 0); rs232in: in std_logic; rs232out: out std_logic); end RS_control; architecture Behavioral of RS_control is signal LCD_symbol : std_logic_vector (7 downto 0); signal my_out : std_logic; signal lclk : std_logic_vector(19 downto 0); subtype word10 is std_logic_vector (8 downto 1); type serial_pac is array (0 to 21) of word10; Less significant bit, which allows to change the size of the rectangle internal signal to store the result internal signal to store an output for RS232 low frequency clock word10 allows to change the number of bits in the vectors if required Subtype is the same type as its base type. Assignment between subtype and base type objects can be made without conversion serial_pac contains 22 words (ASCII codes), which will be sent through RS232

20 20 constant line_RS : serial_pac := ( x"1B", --delete display x"44", --delete display x"4C", --delete display x"1B", --define a rectangle (ESC) | if rin = “0…0" x"42", --define a rectangle (code of this operation) x"52",-- extend to right x"01",-- number given to this rectangle x"2A",-- x1 x"2A",-- y1 x"7A",-- x2 x"4A",-- y2 x"04",-- start value (0...254) x"84", -- end value (0...254) x"04",-- number of pattern x"1B",-- draw the defined above rectangle (ESC) x"42",-- draw the defined above rectangle (code) x"01",-- number x"5A",-- new value in between start and end x"1B", -- draw the defined above rectangle (ESC) | if rin /= “00000000" x"42", -- draw the defined above rectangle (code) x"01", -- number x"3F"); -- new value in between start and end These 22 ASCII codes will be sent sequentially to RS232 beginning from the top code (1B 16 ) and ending by the bottom code (3F 16 ) LCD command clear display LCD command that defines (but does not draw) a bar (a rectangle). All the details are given in http://www.lcd-module.de LCD command that draws the defined above rectangle

21 21 begin process(clk,rst) begin if rst = '1' then lclk '0'); elsif falling_edge(clk) then lclk <= lclk+1; end if; end process; process(clk, rst) variable tmp: integer; variable ind, ind1: integer; begin if rst= '1' then tmp:=0; ind:=0; ind1:=0; my_out<='1'; elsif rising_edge(clk) then if lclk(lclk'left) = '1' then -- rin = “00000000" then – use this italic line for the mode 2 if ind <= 17 then case tmp is when 0 => my_out <= '0';tmp:=tmp+1; when 1 to 8 =>my_out <= line_RS(ind)(tmp); tmp:=tmp+1; when 9 => my_out <= '1';tmp:=tmp+1; when 10 to 1500 =>tmp:=tmp+1; my_out<='1'; when 1501 => tmp:= 0; ind:=ind+1; ind1:=0; when others => tmp := 0; end case; end if; This process provides low frequency for changing sizes of the rectangles on the LCD in visual mode. This process can be removed for the second mode This block is executed for the first rectangle with larger size

22 22 else if ind1 <= 21 then case tmp is when 0 => my_out <= '0';tmp := tmp + 1; when 1 to 8 =>my_out <= line_RS(ind1)(tmp); tmp := tmp + 1; when 9 => my_out <= '1';tmp := tmp + 1; when 10 to 1500 => tmp := tmp + 1; my_out <= '1'; when 1501 => tmp := 0; ind1 := ind1 + 1; ind := 0; when others => tmp := 0; end case; end if; RS232out <= my_out; end process; This block is executed for the second rectangle with smaller size

23 23 process(clk, rst) variable tmp: integer; variable ind: integer; begin if rst= '1' then tmp:=0; ind :=0; elsif falling_edge(clk) then if rs232in = '0' then ind := 1; end if; if (tmp >= 1) then if (tmp <= 8) then LCD_symbol(tmp-1) <= rs232in; end if; if ind = 1 then tmp := tmp + 1; end if; if (tmp >= 9) and (rs232in = '1') then tmp := 0; ind := 0; end if; result <= LCD_symbol; end process; end Behavioral; This process receives data from LCD, which can be generated when you touch the panel. This block will be needed for the next example (example 3) See slide 7

24 24 ABCD ADD ORT TEST 1 touch A ORT ADD TEST received_ASCII A 2 touch B received_ASCII B 3 touch A TEST ADD ORT received_ASCII A 4 touch C received_ASCII C ORT ADD TEST 5 touch D received_ASCII D touch B to reset a previous menu option

25 25 library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.STD_LOGIC_ARITH.ALL; use IEEE.STD_LOGIC_UNSIGNED.ALL; use ieee.numeric_std.all; entity RS_control is Port (clk: in std_logic; rst: in std_logic; rin : instd_logic_vector(7 downto 0); result: outstd_logic_vector(7 downto 0); rs232in: in std_logic; rs232out: out std_logic); end RS_control; architecture Behavioral of RS_control is subtype word10 is std_logic_vector (8 downto 1); type serial_pac is array (0 to 72) of word10; signal LCD_symbol : std_logic_vector (7 downto 0); signal my_out : std_logic;

26 26 constant line_RS : serial_pac := ( x"1B", --0 x"46", --1 x"05", --2 x"02", --3 x"01", --4 x"1B",--5 x"51",--6 x"43", --7 x"00",--8 x"1B",-- 9 std_logic_vector(to_unsigned(character'pos('D'), 8)),-- 10 std_logic_vector(to_unsigned(character'pos('L'), 8)),-- 11 x"1B",--19--12-- command ID x"54",--20--13-- initiation of touch command x"48",--21--14-- horizontal labeling x"01",--22--15 -- upper left touch field x"0C",--23--16-- lower right touch field x"41",--24--17-- return code of the letter A x"02",--25--18-- drawing of key with frame x"41",--26--19-- drawing of letter A in the frame x"00",--27--20-- end of this command x"1B",--21 x"54",--22 x"48",--23 x"04",--24 x"0F",--25 x"42",--26 x"02",--27 x"42",--28 x"00",--29 sets font switches the cursor off clears the display (compare with the slide 20) similar command 0C 16 =12 10 received_ASCII A A B

27 27 x"1B",--30 x"54",--31 x"48",--32 x"07",--33 x"12",--34 x"43",--35 x"02",--36 x"43",--37 x"00",--38 x"1B",--39 x"54",--40 x"48",--41 x"0A",--42 x"14",--43 x"44",--44 x"02",--45 x"44",--46 x"00",--47 similar command ABCD

28 28 x"1B",-- command ID x"4E",-- display menu x"48",-- horizontal menu x"60",-- x for upper left corner x"30",-- y for upper left corner x"01",-- currently inverted item std_logic_vector(to_unsigned(character'pos('A'), 8)), std_logic_vector(to_unsigned(character'pos('D'), 8)), x"7C",-- separator std_logic_vector(to_unsigned(character'pos('O'), 8)), std_logic_vector(to_unsigned(character'pos('R'), 8)), std_logic_vector(to_unsigned(character'pos('T'), 8)), x"7C",-- separator std_logic_vector(to_unsigned(character'pos('T'), 8)), std_logic_vector(to_unsigned(character'pos('E'), 8)), std_logic_vector(to_unsigned(character'pos('S'), 8)), std_logic_vector(to_unsigned(character'pos('T'), 8)), x"00",-- separator x"1B",-- command ID x"4E",-- the next menu item is inverted x"1B", -- command ID x"4E", -- the previous menu item is inverted x"50"); -- the previous menu item is inverted ABCD ADD ORT TEST

29 29 begin process(clk, rst) variable tmp: integer; variable ind, ind1, ind2 : integer; begin if rst= '1' then tmp:=0; ind := 0; ind1 := 67; ind2 := 70;RS232out <= '1'; elsif rising_edge(clk) then if ind <= 66 then case tmp is when 0 => my_out <= '0';tmp := tmp + 1; when 1 to 8 =>my_out <= line_RS(ind)(tmp); tmp := tmp + 1; when 9 => my_out <= '1';tmp := tmp + 1; when 10 to 1500 => tmp := tmp + 1; my_out <= '1'; when 1501 => tmp := 0; ind := ind + 1; when others => tmp := 0; end case; end if; if ind1 <= 69 then if LCD_symbol = x"41" then case tmp is when 0 => my_out <= '0';tmp := tmp + 1; when 1 to 8 =>my_out <= line_RS(ind1)(tmp); tmp := tmp + 1; when 9 => my_out <= '1';tmp := tmp + 1; when 10 to 1500 => tmp := tmp + 1; my_out <= '1'; when 1501 => tmp := 0; ind1 := ind1 + 1; when others => tmp := 0; end case; end if; the values of these variables will be changed below in the process dependently on the code of a symbol received from touch panel of the LCD thus, different control subsequences will be activated

30 30 if ind2 <= 72 then if LCD_symbol = x"43" then case tmp is when 0 => my_out <= '0';tmp := tmp + 1; when 1 to 8 =>my_out <= line_RS(ind2)(tmp); tmp := tmp + 1; when 9 => my_out <= '1';tmp := tmp + 1; when 10 to 1500 => tmp := tmp + 1; my_out <= '1'; when 1501 => tmp := 0; ind2 := ind2 + 1; when others => tmp := 0; end case; end if; if LCD_symbol = x"42" then ind1 := 67; ind2 := 70; end if; RS232out <= my_out; end process; if LCD_symbol = x"42" then ind1 := 67; ind2 := 70; end if;

31 31 process(clk, rst) variable tmp: integer; variable ind: integer; begin if rst= '1' then tmp:=0; ind :=0; elsif falling_edge(clk) then if rs232in = '0' then ind := 1; end if; if (tmp >= 1) then if (tmp <= 8) then LCD_symbol(tmp-1) <= rs232in; end if; if ind = 1 then tmp := tmp + 1; end if; if (tmp >= 9) and (rs232in = '1') then tmp := 0; ind := 0; end if; result <= LCD_symbol; end process; end Behavioral; This process receives data from LCD, which can be generated when you touch the panel. See slide 7 ABCD

32 32

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