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MAPLD 2009 Presentation Poster Session

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Presentation on theme: "MAPLD 2009 Presentation Poster Session"— Presentation transcript:

1 MAPLD 2009 Presentation Poster Session
Re-programmable Prototyping for Actel™ RTAX and RTSX space-flight systems designs MAPLD 2009 Presentation Poster Session

2 Today’s Prototyping Solution
Socket + AX/SX-A Approach Good solution, but several design iterations could require several of the OTP (One Time Programmable) or Actel AX/SX-A commercial chips to complete the design. Weak Point The potential risk for using several of these OTP or AX/SX-A devices could add to the overall project cost and impact the budget.

3 Today’s Prototyping Design Flow
Create and Verify Design Code Synthesize and Implement for OTP chip Modify and Verify Design Code N Test in Hardware: Results OK? Throw Away OTP Chip! Y Synthesize and Implement for target technology Final Hardware Tests

4 Aldec Re-programmable Solution
Ability to prototype RTAX-S/SL and RTSX-SU designs using re-programmable Actel Flash ProASIC®3E FPGA family chips Adaptor board is footprint-compatible with the final RTAX-S/SL and RTSX-SU device Programming connector (JTAG) allows on-the-fly reprogramming of the device without detaching the adaptor from the target PCB EDIF netlist converter allows to migrate from RTAX-S/SL and RTSX-SU to ProASIC®3E FPGA easily Design efficiency is achieved, saving Development Time and Costs

5 Aldec Suggested Design Flow 1
Create and Verify Design Code Synthesize and Implement for ProASIC® FPGA N Test in Hardware: Results OK? Modify and Verify Design Code Y Synthesize and Implement for target technology Preferred flow for PURE HDL Designs Final Hardware Tests

6 Aldec Suggested Design Flow 2
Generate netlist for target technology Netlist Conversion Implement for ProASIC® FPGA N Test in Hardware: Results OK? Modify and Verify Design Code Y Implement for target technology Flow for schematic and legacy designs Final Hardware Tests

7 The Advantages of Flash
is better for prototyping than SRAM-based FPGAs: Word Select / Bias Output Input Bit Select 1 Bit Select 2 SWITCH Floating Gate Flash MEMORY Erase Program Sense Word line VCC VCC Bit Line A B Bit Line SRAM Flash switches are used in the ProASIC3/IGLOO architecture to connect signal lines to logic tile inputs and outputs. The ProASIC3 flash switch uses one transistor. Charges stored in the floating gate determine if signal lines are connected. The SRAM interconnect is larger – it contains 4 transistors and two resistors. A 6T cell. The smaller flash switch allows abundant routing resources to be placed on the die resulting in a high percentage of utilization and routability at very cost effective price points. Smaller size: more switches for greater routing flexibility Low power: less capacitance and resistance Reprogrammable and non-volatile 7

8 ProASIC®3 FPGA Key Data Device Features
Devices range from 15,000 to 3 million system gates Up to 504 Kbits of true Dual-Port SRAM Up to 620 user I/Os Up to 6 PLLs 1 Kb User Flash memory (FlashRom) Secure ISP using on chip 128 bit AES encryption/decryption Support for wide range of packages including PQ, VQ, TQ, QN, FG RoHS compliant packages available Offers pin compatibility across families for easy migration Support for various IO standards Standard IO: LVTTL, LVCMOS, PCI Differential IO: LVPECL, LVDS…. Advanced IO: (ProASIC3E) : GTL, GTL+, HSTL, SSTL2, SSTL3….

9 Prototyping Adaptors and Converter
ALDEC Prototyping Solution consists of two parts: Selection of Prototyping Adaptors (designers picks adaptor according to the desired package of RTAX/RTSX chip and design size) EDIF Netlist Converter (allows conversion of RTAS/RTSX netlist to ProASIC3 format, skipping synthesis stage and proceeding directly to implementation) Converter use is optional, but allows faster workflow in many design cases

10 A3PE1500/3000-CQ256 Adaptor Description Capacitors A3PE1500-FGG484 or
Adaptor size: 43.07mm x 43.07mm The following elements reside on the top part of the adaptor Actel ProASIC3E device A3PE1500- FGG484 or A3PE3000-FGG484 JTAG connector Capacitors, resistors The following elements reside on the bottom part of the adaptor Leads that mimic CQ256 package Capacitors A3PE1500-FGG484 or A3PE3000-FGG484 JTAG Connector Leads that mimic CQ256 package

11 A3PE1500/3000-CQ352 Adaptor Description Adaptor size: 55mm x 55mm
A3PE1500-FGG484 or A3PE3000-FGG484 Capacitors Description Adaptor size: 55mm x 55mm The following elements reside on the top part of the adaptor Actel ProASIC3E FPGA device A3PE1500-FGG484 or A3PE3000- FGG484‏ JTAG connector Power connector Capacitors, resistors The following elements reside on the bottom part of the adaptor Leads that mimic CQ352 package Power Connector JTAG Connector Leads that mimic CQ352 package

12 A3PE3000-CG624 Adaptor Description Adaptor size: 32.5mm x 34mm
The following elements reside on the top part of the adaptor Actel ProASIC3E FPGA device, A3PE3000-FGG896‏ JTAG connector Capacitors, resistors The following elements reside on the bottom part of the adaptor Leads that mimic CG624 package A3PE3000-FGG896 JTAG Connector Capacitors Ball grid array that mimics CG624 package

13 RTAX4000S/SL-CQ352 Adaptor Description Adaptor size: 55mm x 55mm
The following elements reside on the top part of the Daughter Board AND Mother Board Actel ProASIC3E FPGA device A3PE3000- FGG896‏ JTAG connector Capacitors, resistors The following elements reside on the Bottom part of the adaptor Leads that mimic CQ352 package

14 RTAX4000S/SL-CQ352 Adaptor Block Diagram Description
CQ352 leads connected to FPGA1 on Mother Board (166 I/Os, 1:1 mapping), single ended and LVDS transmissions supported FPGA2 on Daughter Board is connected to FPGA1 (on Mother Board) only 167 interconnections between FPGA1 and FPGA2 (single ended)‏ Additional 8 micro-coax connectors for each FPGA External clocks can be delivered Can be used as additional interconnections between FPGA1 and FPGA2

15 Aldec RTAX-S/SL Adaptors
•** RTAX2000S–CG624 •* RTAX4000S–CQ352 RTAX2000S–CQ352 RTAX2000S–CQ256 • RTAX1000S–CG624 RTAX1000S–CQ352 RTAX250S–CQ352 A3PE3000-CG624 A3PE3000-CQ352 A3PE1500-CQ352 A3PE1500-CQ256 ADAPTOR BOARD TO BE USED FOR PROTOTYPING RTAX-S DEVICE TO PROTOTYPE * The adaptor can be used to prototype the specified RTAX-S/SL device only if the customer design does not exceed the capacity of the flash device on top of the adaptor. ** Industrial configurations available for CQ352 and CG624 adaptors

16 RTSX-SU Prototyping NEW Adaptors Description Stacked Architecture
Mother Board with Actel ProASIC3 FPGA and RTSX-SU compatible leads Daughter Board with Power components and JTAG connector Packages supported CQ208 CQ256 CG624 1:1 I/O and bank mapping Powered from the target board (through RTSX-SU pins)

17 Aldec RTSX-SU Adaptors
RTSX-SU DEVICE TO PROTOTYPE ADAPTOR BOARD TO BE USED FOR PROTOTYPING ACT-RTSX-CQ208 ACT-RTSX-CQ256 ACT-RTSX-CG624 RT54SX32SU–CQ208 • RT54SX32SU–CQ256 • RT54SX72SU-CQ208 • • RT54SX72SU-CQ256 • RT54SX72SU-CG624 •* *The adaptor is available in ACT-RTSX-CG624-3V3 and ACT-RTSX-CG624-5V option

18 RTAX2A3P EDIF Netlist Converter
performs automatic conversion of the RTAX-S/SL and RTSX-SU EDIF netlist to ProASIC3E FPGA EDIF netlist Features Conversion of combinatorial primitives Conversion of sequential primitives Conversion of I/O macros Memory conversion Replacement of sequential primitives to TMR primitives

19 RTAX2A3P EDIF Netlist Converter
RTAX-S/SL RTSX-SU EDIF netlist RTAX-S/SL RTSX-SU PDC file Input RTAX-S/SL or RTSX-SU EDIF netlist RTAX-S/SL or RTSX-SU PDC file Output ProASIC3E FPGA EDIF netlist ProASIC3E FPGA PDC file for selected adaptor board Primitives Library RTAX and RTSX to ProASIC3E FPGA Converter Pin Location Library ProASIC3E FPGA EDIF netlist ProASIC3E FPGA PDC file Implementation for ProASIC3E FPGA in Actel Designer

20 RTAX2A3P EDIF Netlist Converter
Primitives Mapping Number of RTAX-S primitives Number of ProASIC3E FPGA primitives Best Case mapping 1 Worst Case mapping 2.5 Average mapping 1.5

21 Summary Reduce chip costs Save Development Time – “Re-Programmability”
ProASIC®3 FPGA “flash-based” technology Wide Device & Package Support: CQ208, CQ256, CQ352 & CG624 packages Footprint compatible adaptors Automatic translation of netlist, memories and constraints Customer proven with over 100 units shipped worldwide

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