1. Copyright (c) 2003 by Valery Sklyarov and Iouliia Skliarova: DETUA, IEETA, Aveiro University, Portugal

2. Example 2. A project that demonstrates an iteraction with external devices such as buttons, switchers and LEDs The circuit will be designed on the basis of TE-XC2Se prototyping board developed by Trenz Electronic with FPGA XC2S300E-6-FT256 CPLD XC9572XL DIP buttons LEDs A(2:1) D(7:0) Read/WriteChip select 1 0 0 1 S 1...S 8 L 1 L 2 L 3 L 4 B4B4 B1B1 M10,T10 P16,L16,L13,J14,G15,F14,E15,B16 M16 M15 00 01 10 States of switchers States of pushbuttons Data for LEDs

3. entity led_but_sw is Port (clk: in std_logic; -- clock 48 MHz rst : in std_logic; -- reset cpld_rw: inout std_logic; -- cpld read/write cpld_cs: out std_logic; -- cpld chip select a: out std_logic_vector(2 downto 1); -- a – address d: inoutstd_logic_vector(7 downto 0)); -- d – data end led_but_sw; architecture Behavioral of led_but_sw is signal state: std_logic_vector(3 downto 0); signal lled: std_logic_vector(7 downto 0); signal lpb : std_logic_vector(7 downto 0); signal dipswitch : std_logic_vector(7 downto 0); begin

4. process(clk, rst) -- process that describes a state sequencer begin if rst= '0' then state '0'); -- state = 00…0 elsif rising_edge(clk) then state<= state + 1; -- increment state end if; end process; process(clk, rst) -- process that describes begin -- interactions with cpld if rst= '0' then cpld_cs <= '1'; elsif (clk='0' and clk'event) then

5. case state is -- for address 00 – reading the states of pushbuttons when "0000"=>a<= "00"; cpld_cs <= '1'; --passive cpld_rw <= '1'; --read when "0001"=>cpld_cs <= '0'; --active when "0010"=>lpb <= d;-- data from push buttons when "0011"=>cpld_cs <= '1'; --passive -- for address 10 – writing LEDs in the last process when "0100"=>a <= "10";cpld_rw <= '0';--write when "0101"=>cpld_cs <= '0'; --active when "0110"=>cpld_cs <= '1'; --passive -- for address 01 – reading the states of switchers when "0111"=>a <= "01"; cpld_cs <= '1'; --passive cpld_rw <= '1'; --read when "1000"=>cpld_cs <= '0'; --active when "1001"=>dipswitch <= d; -- data from push switchers when "1010"=>cpld_cs <= '1'; --passive when others =>cpld_cs <= '1'; --passive end case;

6. lled <= dipswitch; -- copy switchers to LEDs if (dipswitch(7)='1') then lled(3 downto 0)<= not lpb(3 downto 0); else null; end if; end if;-- if S7=0 swithers are copied to LEDs end process;-- if S7=1 buttons are copied to LEDs process (lled,cpld_rw)-- writing LEDs to cpld begin-- i.e. writing LEDs to pushbuttons if (cpld_rw='0') then – if write is active d <= lled; -- writing LEDs to cpld else d <= "ZZZZZZZZ"; -- high impedance end if; end process; end Behavioral;

7. NET "clk" TNM_NET = "clk"; TIMESPEC "TS_clk" = PERIOD "clk" 48 MHz HIGH 50 %; NET "rst" LOC = "P15" ;# individual LED NET "d " LOC = "P16" ; NET "d " LOC = "L16" ; NET "d " LOC = "L13" ; NET "d " LOC = "J14" ; NET "d " LOC = "G15" ; NET "d " LOC = "F14" ; NET "d " LOC = "E15" ; NET "d " LOC = "B16" ; NET "cpld_rw" LOC = "M15" ; NET "cpld_cs" LOC = "M16" ; NET "clk" LOC = "T9" ; NET "a " LOC = "M10" ; NET "a " LOC = "T10" ; CPLD XC9572XL A(2:1) D(7:0) Read/WriteChip select P16,L16, L13,J14, G15,F14, E15,B16 M16 M15 M10,T10 48 MHz