1. About Teratech Teratech division is a supplier of innovative programmable logic solutions,including field- programmable gate arrays(FPGAs) based on antifuse and flash technologies, as well as high-performance intellectual property(IP),software development tools and design services. Also supplies EDA solutions that achieve timing closure before physical implementation. Actel Products ProASIC Flash Type and Single Chip Reprogrammable (ISP) and Nonvolatile FlashLock ™ Security Live at Power Up Low Power System Gates : 75,000~1,000K Antifuse Type High-Performance low-cost single-chip solution Live at Power Up Low Power System Gates : 3,000~2,000K Key Features

2. Actel Design Flow In Time Products Time Architect - Chip estimation Architectural floorplanner Time Planner - RTL characterization/debug RTL floorplanner Refined chip estimation Wire load model generation RTL static timing Synthesis constraint generation Time Builder Interactive floorplanner Hierarchical RTL and gate-level Key Features In Time S/W delivers EDA solution that achieve timing closure before synthesis and place&route step. HDL Editor Silicon Sculptor Design Entry ACTgen Viewdraw HDL Editor Synthesis Synplify Verification Modelsim Waveformer Programmer Silcon Sculptor Flash Pro Layout Designer

3. Training Center Curriculum & Period -Actel S/W(Libero) course : 2day -VHDL course : 1day http://www.inc.co.kr/teratech Using a simple design example, each student is guided through the complete flow of a hierarchical design including ; Project creation HDL and schematic entry,synthesis,testbench eneration, simulation,design layout and analysis,program file generation.