1. PSoC Designer Module 1: Introduction to PSoC
Welcome to CYU’s PSoC Designer Module 1: Introduction to PSoC. Module 1 is the first of a four-part series of courses designed to quickly move you up the PSoC learning curve.
These modules will give you the basics to get started on a PSoC Designer project. Module 1 specifically covers the PSoC device and provides an overview of the PSoC Designer tool.
PSoC Designer Module 1: Introduction to PSoC

2. Module Outline Section 1: Introduction to PSoC
Section 2: PSoC Designer™ IDE Software
Section 3: Hands-On Example Project
The agenda for this module is as follows:
First, we will introduce the PSoC device, a unique mixed-signal array with an embedded microcontroller and onboard configurable analog and digital resources.
Next, we’ll take a high-level look at PSoC Designer, the IDE software that supports PSoC designs.
Then, we’ll examine the support mechanisms available to PSoC users.
Lastly, there is an example project that accompanies this module. Completing this example project is one of the most valuable aspects of PSoC Designer Module 1.
Let’s get started. 8

3. PSoC An Introduction

4. What is a PSoC Mixed Signal Device?
PSoC combines:
the familiarity of a microcontroller
the configurability of an CPLD
the capabilities of an Mixed – Signal Array
P rogrammable
S ystem
o n
C hip
PSoC stands for programmable system on chip. It is a mixed signal array with on-board 8-bit controller.
PSoC, because of the on-board controller, feels like a microcontroller, and as such it is programmed in C
or assembly language. But PSoC consists of blocks that can be configured to perform typical MCU
functions as well as a atypical system functions based upon a user’s needs, and these functions can be
routed to nearly any pin, much like an FPGA. Yet PSoC provides configurable digital and analog blocks
that can be combined into any custom configuration completely on-chip, looking more like an ASIC without
the NRE or waiting.

5. What is PSoC? PSoC Devices Features: Configurable Analog Blocks
Implement ADCs, DACs, filters, amplifiers, comparators, etc.
Configurable Digital Blocks
Implement timers, counters, PWMs, UART, SPI, IrDA, etc.
4KB to 32KB of Flash memory for program storage
256B to 2KB of SRAM for data storage
M8C Microcontroller: 4 Million Instructions Per Sec

6. What is PSoC? Inputs Each pin can sink 25mA Programmable filters
Flexible sensor interface I/O
3 types of ADCs, up to 4
Processing
Fast M8 Microcontroller Core
Multiply Accumulate
Outputs
Each pin can source 10mA
Up to 16 PWMs, Timers, Counters
Up to 9-bit DACs, 14-bit ADCs
Support Functions
EEPROM
Sleep Options
Watch Dog Timer
Low voltage detect
This is a non-exhaustive list of PSoC features. PSoC has a very flexible input structure with nearly every-pin accessible to the configurable PSoC blocks. The compact M8 processing core of PSoC provides up to 4MIPs of performance. The PSoC outputs support digital signals with strong 10mA drives or selectable pull-up and pull-down resistors and analog outputs include 40mA output buffers. Other supporting functions on PSoC devices include eeprom emulation in flash and support for low-power sleep operations.

7. PSoC Die 16k Flash CY8C27XXX – PSoC 1208 POR GPIO RAM Dec. PUMP M8 CPU
BandGap
POR
GPIO
RAM
Dec.
PUMP
M8 CPU
Here is photo of a PSoC die. Note that most of the die is taken up by the analog array, digital rows and memory. The micro controller is just a very small part of the PSoC die. This is because PSoC is much more then a micro controller. PSoC is a true mixed signal system-on-chip dynamically re-programmable solution.
16k Flash
SROM
MAC
32K Osc
PLL/Osc
CY8C27XXX – PSoC 1208

8. Slave, Master, Multimaster
PSoC Architecture
I2C
Slave, Master, Multimaster
UART
ADC
(Decimator)
PWM_16
Here is a block diagram of the whole PSoC chip. The development process for the PSoC is different than a traditional fixed functional microcontroller. The flexibility of the PSoC architecture comes from configurable analog and digital hardware blocks called PSoC Blocks. You can see there are up to 16 – 8 bit Digital Blocks and up to 12 – 8 bit Analog blocks. These blocks have the capability to implement a wide variety of user selectable functions. The analog and digital blocks in yellow are what you will see in GUI.
LCD
Filter

9. Analog Functions (Subset)
ADC
Incremental 6-14 bits
Delta Sigma 6-13 bits
DAC
6, 8, and 9 bit
6 and 8 bit multiplying
Filters
2-pole Low-pass
2-pole Band-pass
DTMF Dialer
Modulator
Peak Detector
V to I Converter
Amplifiers
Programmable Gain
Instrumental
Inverting
Comparators
Programmable
Hysteresis
Zero-Crossing
CapSense
This slide depicts some of the typical functions you would implement with the continuous time and switched capacitor analog blocks

10. Digital Functions (subset)
Timer
8, 16, 24, 32 bit
Counter
PWM
Dead Band Generator
Pseudo Random Source
Cyclic Redundancy Check
Communication Interface
I2C Master
I2C Slave
SPI Master
SPI Slave
Full Duplex UART
Tx, Rx
Full Speed USB v2.0

11. Interconnection Scheme
Define connections between pins and function blocks
Define connections between function blocks
Define clock paths
Change connections dynamically too!
In addition to controlling what functions appear and when they appear, the user can also control how they interconnect.
Here you see a screen shot from PSoC Designer. From within PSoC Designer users have control over the total configuration of PSoC. This includes the connections between the pins and function blocks, the clock paths, and how those connections vary over time, i.e., dynamic reconfiguration.

12. User Modules Pre-configured and Pre-characterized Digital
and Analog PSoC Blocks
Greatly simplifies and shortens coding process
Analogous to On-chip Peripherals
ADCs, DACs, PGAs, Filters
Timers, Counters, PWMs
UART, SPI, I2C
Defines the Register Bits for Initial Configuration
Selected via Double Click in IDE
User Modules Include
Application Programmer Interfaces (APIs)
Interrupt Service Routines (ISRs)
Specific UM Data Sheets
The PSoC IDE has libraries of open source code software modules, called “User Modules,” that simplify the configuration process. These user modules have been created to make selecting and implementing peripheral functions very easy. They are pre-configured and pre-characterized digital and analog PSoC Blocks.
When you generate an application it creates an API, ISR and data sheets for all the user modules used in your project.
Over 50 user modules to choose from (53 total)

13. Additional Features
Comprehensive Design Tools
Intuitive Resource Placement
Easy Routing
Powerful Logic
Dynamic Reconfiguration

14. PSoC Design Tools Free Design Software Low Cost ICE Device Editor
Application Editor
C Compiler
Assembler
Librarian
Debugger
Low Cost ICE
CY3215-DK
Trace, Dynamic Event Point
Every thing you need for
PSoC development
Graphical Application Design Software…… No MCU Coding!

15. PSoC® Designer™ 5.0 A New Paradigm in Embedded Design
An integration of PSoC software
PSoC Express™ - a visual embedded code free design environment
PSoC Designer a powerful and more traditional IDE
MS Visual Studio based GUI—dock, tab, and float windows
Upgraded Debugger; new “Run-to-Cursor” breakpoint features
PSoC Express
PSoC Designer 4.4
PSoC Designer 5.0
EASY-TO-USE, FAST, FLEXIBLE

16. PSoC Designer 5.0 System-Level View (Formerly PSoC Express)

17. PSoC Designer 5.0 Chip-Level View (Formerly PSoC Designer 4.4)

18. PSoC Designer 5.0 System-Level to Chip-Level Transitions
Design & Build
Optimize the Design 3 1 2 4
Open Chip-View
Customize the Code

19. PSoC® Programmer™ 3.xx Customize & Enhance your PSoC Programming Experience
Customizable GUI—maximize & minimize what you want to see
COM object architecture—open access to programmer functionality
Automatic PSoC Programmable System on Chip Detection
Accelerated prototyping—turn timely verification on/off as needed
Huge array of GUI enhancements—cleaner, easier to use interface
Simple View
Classic View
Modern View

20. PSoC Programmer 3.xx Classic View

21. PSoC Programmer 3.xx Modern View

22. PSoC Programmer 3.xx Simple View

23. Section 2: PSoC Designer IDE Software
In this section, we will cover the basics of PSoC Designer graphical design tool, specifically how to start a project in PSoC Designer and how to efficiently navigate through the design environment to create your PSoC design.

24. Intuitive Placement
1) Drag Green “Target Placer” from default location
Drag to desired location
(Target Placer box fills in green when place-able)
3) Press “Place User Module Button”

25. Easy GUI Routing
You’re interested in the digital logic available in PSoC. Lets start with routing. Its easy.

26. Powerful Combinational Logic
Digital System
Utilizing the logic capabilities of PSoC is easy with this powerful yet simple routing GUI.

27. Powerful Combinational Logic
Analog System
Utilizing the logic capabilities of PSoC is easy with this powerful yet simple routing GUI.

28. Dynamic Reconfiguration
More than meets the eye: Multiple Configurations
Another screen shoot of PSoC Designer. Here you see that they UMs are easily placed

29. Integrated Development Environment
Device Editor
Application Editor
C Compiler
Assembler
Librarian
Debugger
As you have briefly seen, harnessing the power of PSoC requires a great development tool. PSoC Designer is PSoC’s integrated development environment.
There are three main subsystems in PSoC Designer: (1) the Device Editor, (2) the Application Editor, and (3) the Debugger. Over the next several slides, I will provide you with an overview of each of these subsystems.
Another important point about PSoC Designer is that you can write your project code in either C or assembly language. The C compiler is built in to PSoC Designer, but to enable it you’ll need a C compiler license. The assembler is standard, however, and requires no extra license.
PSoC Designer can be downloaded for free from

30. PSoC Designer Device Editor – Interconnect View
Placing User Modules
View block architecture with combined UM & port views
Generates routed block to block schematic
Routed global I/O connection schematic
Step through potential UM placement options
Select desired placement option for UM
Select UM and resource interconnections
Select/configure UM and global device resources
Define clocking for UMs
Configure mode and drive level for GPIO pins
Global resources table
UM Workspace
User module parameter table
User Module window
The Interconnect View is the second view that the Device Editor offers. Here you see a picture of the Device Editor’s Interconnect View. The Interconnect View offers several powerful configuration tools. Starting from left to right:
On the far left, you’ll notice a series of 3 tables. The top table is the Global Resources table. This table is where you set resources that are global to the device as a whole, such as the variable clock and the CPU clock.
Below that is the User Module Parameters table. This table is where you can set parameters that are specific to each user module such as the pulse width of the pulse width modulator.
Below that, in the bottom left hand corner, is the Port table. This table allows you to configure the ports’ mode and drive level for GPIO pins in an easy-to-use drop-down menu approach.
The middle window of the screen pictures the User Module Workspace. This is where you can place and route user modules. In PSoC Designer Module 2: Designing with PSoC, you’ll learn all about the different nets and muxes that are available to route between blocks, pins, and other resources.
The far right-hand window pictures the chip from an exterior view. This is the Pin-Out window. The window displays a color-coded representation of the ports and also allows some routing capability.
As you can see, the Interconnect View provides several powerful tools for PSoC configuration including routing, defining clocks, and much more.
Port table

31. PSoC Designer Application Editor
For Users to Write Code
For Users to Assemble/Compile Code
View and edit individual source files
Set and remove bookmarks (Editing tool)
Assemble/compile individual files
Build entire project including assemble/compile* all files in project
Source line error pointer
So far we’ve only mentioned the Device Editor, which is the first subsystem in PSoC Designer.
The second subsystem is the Application Editor, which allows you to
Edit source code files written in C and assembly language
Set breakpoints
Assemble/Compile
Notice a file tree on the far left side of the screen shot. This file tree allows you to quickly navigate between code files, many of which are generated when you click the Generate Application button in the Device Editor.
* The C compiler needs to be enabled for use.

32. PSoC Designer C Compiler
The C compiler by Hi Tech is an optional component of the PSoC Designer IDE. Once enabled, it is fully integrated into the IDE and allows PSoC Designer to support C source level debugging.
Features Include:
ANSI C Compiler
Supports Inline Assembly and can interface with Assembly Modules
Integrated code compressor
Modern Stack-Based Architecture
7 Basic Data Types Including IEEE 32-Bit Floating Point
Assembler and Linker
Math and String Libraries
C Interrupt Service Routines
Librarian
For more info on the C compiler, please see the C language compiler user guide in the documentation folder of PSoC Designer.
As mentioned earlier, a C compiler is available for PSoC Designer. This C compiler is a third-party compiler through iMAGEcraft. This compiler has a full feature set as you can see.
For more info on the C compiler please see the C language compiler user guide available in the documentation folder of PSoC Designer.

33. PSoC Designer Debugger
Interface to ICE
View contents of Register and Memory spaces
Change the contents of the register banks and the RAM
Run/Halt /Single Step
Set breakpoints and event points
Capture trace
The final subsystem in PSoC Designer is the Debugger, which allows you to
Interface to an In-Circuit Emulator for single-step program debugging
Define complex break events
Enable trace capability
View contents of program/register/RAM space
Run/stop/step through program
The debugger’s several powerful tools will be explained in detail in PSoC Designer Module 3: Debugging.
Note: We will not be using the DeBugger during this workshop

34. PSoC Hands On Example Project
Section 3: Cypress’ Commitment to Support

35. PSoC Design Flow Determine system requirements Choose User Modules
Place User Modules
Set global and User Module parameters
Define the pin-out for the device
Generate the application
Review generated code
Demonstrate working configuration
Now that you have seen the overview of the PSoC microcontroller and PSoC Designer, lets jump in the deep-end and get started.
We will follow these steps, in order, and at the end see the working MCU project
Start PSoC Designer IDE software at this time, and we will walk through step by step in the following slides.

36. Project Requirements
Blink two LEDs at approximately 2Hz, with duty cycle of 40% and 20%
Implementation:
Create An MCU with Two Pulse Width Modulators:
Select Two PWM User Modules
Set the PWM parameters
Initialize the global clocks
Connect the PWM outputs to the PSoC Pup LEDs

37. Project Implementation
Pup
PSoC
16-bit PWM
÷ 65535
P2[0]
(1.4Hz)
(1.5MHz)
(94kHz)
24MHz
÷16
÷16
VC1
VC2
16-bit PWM
÷ 65535
P2[1]
(1.4Hz)

38. Starting a New Project
Open PSoC Designer
Select Start new project

39. Starting a New Project
Select Project Type
Name The Project

40. Starting a New Project Select Device and Coding Method OK
CY8C PXI C OK

41. Select and Place User Modules
Select the PWM16 from the User Modules page
Now we need to place the User Modules. So click on the “Interconnect View” icon. You will notice now the Next allowed placement icon, Place user module icon, and the Undo place user module icon are not activated.
(Go though a quick overview of the screen)
So you may be asking yourself, How do I know where to place the User Modules, and does PSoC Designer help me? Well lets take a look.
Place User Modules for this Project
How do I know where to place the User Modules?
How does PSoC Designer help me?

42. Place User Modules Use the Cypress Online Resources
Try-out the modules individually first
See how restrictive they are, then return to original location
PSoC Designer will only allow the modules to be placed where the chip can support them
PSoC Designer will not prevent a placement that may create a conflict for resources
Example: If you have an ADC and temperature sensor, they both use the comparator bus. There is only one comparator bus per column, therefore these two UMs must reside in separate columns in order to be used simultaneously.
Read the UM Data Sheets for details
Use the Cypress Online Resources
Lets first try-out the modules and see how restrictive they are.
PSoC Designer will only allow the module to be placed where the chip can support it, but it will not prevent a placement that may create a conflict for resources.
PSoC Designer will not prevent a placement that may create a conflict for resources
Make sure you read the User Module date sheet for details.

43. Place User Modules
Place the two selected User Modules. Double Click on PWM16 wait a few moments until the user module is placed in the Interconnect Window - repeat
PWM16_1 – Digital Blocks DBB00/DBB01
PWM16_2 – Digital Blocks DBB10/DBB11
Recommend placing the PWMs in the Basic Digital Blocks to Save the Digital Communication Blocks
Now lets go ahead and place the two PWMs, feel free to hit the Next Allowed Placement Icon before placing so you can get a feel for the various placements the PWMs are supported. So lets go ahead and place PWM16_1 in Digital Blocks DBB00 & DBB01, and lets place PWM16_2 in Blocks DBB10 & DBB11. We selected PWM16_2 to be placed in these digital blocks to start a good habit by placing the PWMs in the Basic Digital Blocks to save the digital communications blocks.

44. Place User Modules
When you are done the screen should look like this

45. Configure Global Resources
Power Setting: 5.0V/24MHz
CPU_Clock: SysCLK/2 (12MHz)
32K_Select: Internal
Not using an external crystal
PLL_MODE: Disable
PLL can only be enabled when
32K_Select is External (crystal)
Sleep_Timer: 512_Hz. (Default)
VC1 = SysClk/N: Set to 16
This divides 24MHz by 16 = 1.5MHz
VC2 = VC1/N: Set to 16
This divides the 24V1 by 16 (1.5MHz/16=94kHz)
VC3 Source: SysClk/1
VC3 Divider: 1
To the upper left of your screen you will see the Global Resources. Let’s start by setting the CPU_Clock to 12MHz by using the pull down menu.
(cont. through slide)
VC stands for Variable Clock.

46. Configure Global Resources
SysClk Source: Internal
SysClk*2 Disable: YES
Analog Power: SC On/Ref Low
This is required to power up any of the analog blocks, depending on the number of analog functions. A Ref Med or Ref High may be required (and will increase power consumption)
Ref MUX: (Vdd/2) ±Bandgap (default)
AGndBypass: Disabled

47. Configure Global Resources
Op-Amp Bias: Low (default)
This is not recommended as anything but low
A_Buff_Power: Low (default)
Adequate for most projects
This selects the power level of the analog output buffer
There is a tradeoff between drive output
power and power consumption.
SwitchModePump: OFF
Trip Voltage [LVD (SMP)]: 4.64V (5.0V)

48. Configure User Modules
PWM16_1: We want to generate a 1/5 duty cycle
User module parameters can be configured in two ways: through the GUI or through the User Module Parameters window. In this class we will use the User Module Parameters window in the left bottom corner.
Set Clock to VC2 (94kHz)
Set Enable High to keep the PWM always running
Set CompareOut to Row_0_Output_0
Set TerminalCountOut to None
Set Period to (1.4Hz)
Set PulseWidth to 13107
Compare Type Less Then Or Equal
Interrupt Type Terminal Count
ClockSync to Sync to SysClk
InvertEnable set to Normal
Right below the Global Resources you will see the User Module Parameters. Make sure the pull down menu is on PWM16_1. We want to generate a 1/5 duty cycle, and get this by setting the PWM’s parameters.
Notice we will be setting the the output of PWM16_1 to Global_OUT_2.
When you get inputting the Period, you will want to double click on the value and type in unless you want to click the up arrow times!

49. Configure User Modules
PWM16_2: We want to generate a 2/5 duty cycle
Set Clock to VC2 (94kHz)
Set Enable High to keep the PWM always running
Set CompareOut to Row_1_Output_1
Set TerminaCountOut to None
Set Period to (1.4Hz)
Set PulseWidth to 26214
Compare Type Less Then Or Equal
Interrupt Type Terminal Count
ClockSync to Sync to SysClk
InvertEnable set to Normal
Now we need to set the parameters for PWM16_2. Use the pull down menu to select this device. Go ahead and input the parameters. Notice the only changes from PWM16_1 is the CompareOut and the Pulse width.

50. Interconnect Blocks to Resources
What interconnection possibilities are there?
Data Inputs
Data Outputs
Clocks
Block-to-block
When you specify a PSoC block connection to a pin you are making a physical connection to the hardware of the PSoC device.
There are 4 types of interconnections possibilities…

51. Define the Pin-out What pins need to be defined? UM Inputs UM Outputs
General Purpose IO
What happens as pins are defined?
Pin-out our project
LEDs
Now it is time to define the pin-outs.
What happens as pins are defined? Define the drive mode of the pin, you define the pin connected to a global bus.
We need to connect the output of the PWMs to LEDs.

52. Interconnect Blocks to Resources
Route PWM16_1 to pin:
Connect PWM16_1 output to Row_0_Output_0
Connect Row_0_Output_0 to GlobalOutEven_0
Left Click
Left Click
We need to connect PWM16_1 output to a pin. We have defined CompareOut of the PWM16_1 to Row_0_Output_0. Now we need to connect this signal to a pin. Right mouse click on the box at the end of Row_0_Output_0.
<Mouse Click>
You will see this window appear. Select A.
Then go to the top buffer and right click. Select GlobalOutEven_0. You will see that the buffer becomes highlighted.

53. Interconnect Blocks to Resources
Route PWM16_1 output to pin
Port 2 is connected to the LEDs on the Pup board
The next step is to right click on Port_2_0 and hit select, remember we are using Port 2 because they are connected to the LED’s.
<Mouse Click>
Next select GlobalOutEven_O.
You will see a connection is made.

54. Interconnect Blocks Resources
Route PWM16_2 output to pin
We need to connect PWM16_2 output to a pin. We have defined CompareOut of the PWM16_2 to Row_1_Output_1. Now we need to connect this signal to a pin. Right mouse click on the box at the end of Row_1_Output_1.
<Mouse Click>
You will see this window appear. Select A.
Then go to the top buffer and right click. Select GlobalOutEven_1. You will see that the buffer becomes highlighted.

55. Interconnect Blocks Resources
Route PWM16_2 output to pin
The next step is to right click on Port_2_1 and hit select, remember we are using Port 2 because they are connected to the LED’s.
<Mouse Click>
Next select GlobalOutEven_1.
You will see a connection is made.

56. Configuration Complete!
Save project – Go to File tab
Now what? Where are we?
Time to “Generate Application”
All settings used by PSoC Designer
to create the boot-up code to configure
the registers at reset
ISRs are created (but not updated)
APIs are created or updated
Device Data Sheet generated
You must Generate Application whenever changes are made to the configuration
We need to save the project. Go to the file tab and click on save project.
Now we need to Generate Application. You must “Generate application” whenever changes are made to the configuration because the “Generate Application” causes the development software to automatically generate the required files for the selected configuration.
Now switch to the Application Editor view

57. Time to Create Application Code
PSoC Designer generates application code based on the configurations you just defined in the Device Editor.
Project File Tree, located to the left of the application window, contains:
all interrupt routines
header files
include files
configuration tables
All APIs and ISRs can be modified by the user.

58. Create Application Code
Open the main.c file
Type the PWM start commands for each PWM_1 and PWM_2
void main() {
// Insert your main routine code here.
PWM16_1_Start () ;
PWM16_2_Start () ;
while (1); }
To complete your project you need to insert the code excerpts listed into main.c
PWM16_1_Start():
PWM16_2_Start():
While (1);

59. Create Application Code

60. Build Project Assembles code, links, and locates
Okay, let’s build the project, this is done by clicking on the Build icon.
Assembles code, links, and locates
Can individually assemble files as well
Explore Application Editor Features
Project file management (view/add/delete files)
Finding compilation errors

61. Program The Device

62. Program The Device Select MINIProg in the port window Select Connect
Select Program
When Programming is complete Toggle Device Power
Congratulations, you have just completed your first PSoC design!

63. Appendix

64. SCBlock Amplifier Examples
Bi-Directional Current Source
DiffAmp configured with gain of one.
CF=CB=CA=16
Sign = Pos
External Resistor and DAC value sets current.
Independent of load.

65. SCBlock Filters FilterCalc
Enter Following Parameters
Rolloff Frequency (f0)
Acceptable Tolerance
Damping Value
Column Clock (fs *4)
FilterCalc generates all Capacitor values
that meet these requirements.
Output file readable with Excel.
43 different solutions for this particular example.

66. SCBlock Low Pass Filter
Programmable
Roll off frequency (f0)
Damping ratio
Gain
300 Hz to 250 kHz
Scaled to clock

67. SCBlock as Comparator Two Cap Comparator
With feedback capacitor CF removed Vout goes to either the high or low rail.
Vout goes high when
VinACA > VinBCB
Vout goes low when
VinACA < VinBCB
VinB is the inverting input input.

68. SCBlock as Integrator SCBlock Integrator
Uses standard gain stage with the exception that the switch to discharge CF has been disabled.
So:

69. SCBlock as Integrator Single Pole LPF
Dual Input SC Integrator
Feedback makes low pass filter with gain.
Ratio of CA & CB determines gain.
CF,CB, and fs determines rolloff frequency.
Setting Vin to Vref makes filter DAC.
Much higher fs than Conventional DAC

70. SCBlock as Integrator Power Driver
Dual Input SC Integrator
External Emitter follower makes a high power output driver.
Able to drive all the way to Vss rail

71. SCBlock as Integrator Speaker Driver
Dual Input SC Integrator
Or a 4 Ohm Class B Speaker Driver.

72. SCBlock as 2 Pole Filter Two Pole Filters
Constructed with a BiQuad Circuit Topology
Continuous Time Implementation shown below
Requires Three Op Amps
Middle one only used to change polarity

73. SCBlocks as 2 Pole Filter
Two Pole Filters
Switched Capacitor Implementation
Requires Only Two Op Amps
High Pass
Band Pass
Low Pass

74. SCBlock Band Pass Filter
Programmable
Center frequency (fc) Q
Gain
300 Hz to 250 kHz
Scaled to clock

75. Elliptical Low Pass Filter
Combines High Pass
and Low Pass Filters
Produces two zeros.
Low pass filter when:

76. SCBlock Notch Filter
Special Case of
Elliptical Low Pass
Filter where: