1. WaitLess*: Presentation #11 Team M2: Jared Dubin Terry Garove Alex Runas Manager: Panchalam Ramanujan Overall Project Objective: Table/bar service interface controller chip 11/19/2007 Full chip LVS, simulation issues

2. Project Status Design proposal – complete Architecture - complete Name – complete Size estimates/basic floorplan – complete RTL / Behavioral - complete Structural – complete Schematic – complete Component layout – complete Functional block layout – complete Final top-level chip LVS – complete Top-level chip simulations – problems

3. “The net-lists match.”

4. Issues/Concerns: - Access to the mathematicians cluster is not working: two of us can’t access it from anywhere, one of us can only seem to get it working some of the time and only from physically inside the ECE undergrad cluster (even connecting to one of the cluster machines and SSHing in was not working) - That might be our only remaining issue. It’s a pretty big one though, as it’s preventing us from being able to run simulations in a reasonable way. - The simulation we did get a chance to run was badly timed, and two hours later we discovered that; hopefully it’s been fixed so it will work the next time we can run it.