1. WaitLess: Changing Restaurants Today for a Better Tomorrow Team Members: Jared Dubin, Terry Garove, Alex Runas Design Manager: Panchalam Ramanujan Where's my waiter!? I'm ready to order!

2. Presentation Outline Marketing Project Description Behavior Description Design Process Floor Plan Evolution Layout Verification Issues Encountered Specifications Conclusions

3. WaitLess Market Potential Total Available Market is over two million restaurants worldwide At one unit per table per restaurant and an estimated 50% gross profit per unit, potential gross is upwards of 50 million dollars Unit pays for itself in lower wait staff costs almost immediately, not to mention increased restaurant throughput due to smaller wait times and increased desire to dine out

4. Unit Specifics Touchscreen Display Generic processor with software pre-programmed to run a User Interface that displays the menu Non-volatile memory to store menu items in Wireless Transmitting Unit to send orders to kitchen Payment Acceptor (Cash/Credit) ‏ WaitLess Interface chip to store data and provide control signals Total Estimated Cost of Production: $100 / unit, mostly for display Estimated Packaged Sale Price: $150 / unit, or more Total Cost to a Restaurant with 100 tables: $15,000 Gross pay to one single waiter at minimum wage for 9 months: $10,400

5. Unit Flow Diagram Memory unit to store menu WaitLess chip Touchscreen + software Wireless transmitter

6. The User Experience Customer enters restaurant and is seated (or seats him/herself) at a table with a WaitLess unit at it already.

7. The User Experience User is presented with the menu stored on the flash drive. Accompanying pictures provide visual aids, as well as software providing nutritional information and filtering options based on food types (chicken, vegetarian) and common allergies.

8. The User Experience User can add items to a “cart” (similar to online shopping), modify items at any point, and remove items. The WaitLess chip keeps a running total of which items and modifications were selected, and how much the total price is; it can also display this information at any time.

9. The User Experience When finished, the user can pay immediately, or print a reciept to pay later based on your restaurant's needs. Upon confirmation, the unit will wirelessly transmit the order and table number to the kitchen.

10. The User Experience Not dining alone? No problem. The WaitLess chip can even store on-chip who ordered which item! When your food is ready, it will be brought out and handed to you with a personal touch.

11. The User Experience Need help? Need your drink refilled now, rather than later? Again, no problem. Every menu screen displays a button to call for assistance, which will forward the request along to the restaurant staff. Somebody will be along to help you shortly!

12. Top-level Behavioral Description Control FSM Inputs from User Inputs from comparators Control signals to registers, SRAM SRAM Item information from off-chip memory Outputs to bus that runs to transmitter AdderMultiplier Price info, cumulative Multiplies tax Final price

13. General State Machine Flow

14. Design Process Overview Make it small Make it cheap Make it work

15. Design Process - Verilog & Schematic Verilog  Extensive simulations performed (quick and easy at this stage) ‏  Logic refinement, design criteria solidified Schematic  Several circuit-level changes later in the design cycle (change to dynamic logic pre-discharge decoder) ‏  Explored feasibility of multiplier changes (slightly less quick and easy at this stage) ‏

16. Design Process - Floorplan Floorplan  We aimed to limit interconnect length by positioning communicating functional blocks close together geographically  The 29-bit multiplier got a *teensy* bit larger than we expected Tearing up the floor boards…  Iterative approach? Yeah, but we had to reconsider routing options later in the design cycle

17. Design Process - Layout Let the biggest blocks prevail  SRAM and Multiplier effectively determined the approximate bounding box for the design  The two blocks accounted for such a high proportion of the overall layout that finding good ways to massage the remaining pieces into place became our primary goal

18. Floorplan - Way back when…

19. Floorplan - Slightly more realistic

20. Layout - Multiplier

21. Layout - SRAM, drivers&decoder

22. Full Chip, Metal1

23. Full Chip, Metal2

24. Full Chip, Metal3

25. Full Chip, Metal4

26. Layout - Full Chip

27. Verification - Pre-dis. Decode

28. Verification - Flip Flop Rise Time

29. Verification - Full Chip State Sim

30. Issues Encountered Floorplan differs from layout  Several blocks diverged greatly from our estimation of their size and shape in the floorplan  The multiplier turned out to be larger than expected, rivaling the SRAM in size, causing us to question whether it would be necessary to redo it with smaller adders  However…

31. Issues Encountered The registers were smaller than we had expected, and the FSM had to be moved due to routing issues Buffering between multiplier cells seemed unavoidable if we switched to a minimal adder As a result, the savings from redoing the multiplier would not be sufficient to correct the dimensions of our chip, as the FSM now dictated to some extent the width of the overall layout

32. Issues Encountered Register concerns  We realized that the flow of the FSM required that we maintain additional flip-flop functionality, which led to a rather strange flip-flop design  Next time we do something like this: use a design that human beings actually work with, not some bizarre moon register

33. Specifications Area  326 x 229 = 74,654 um^2  1.42:1 aspect ratio Transistor Count  21,988 (So close to 22,000 that it’s psychologically *devastating*) Density  0.295 transistor/um^2

34. The Satisfied Customer