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Alfons Weber Towards Electronics for a Long Baseline Neutrino Detector Alfons Weber STFC & University of Oxford ν.

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Presentation on theme: "Alfons Weber Towards Electronics for a Long Baseline Neutrino Detector Alfons Weber STFC & University of Oxford ν."— Presentation transcript:

1 Alfons Weber Towards Electronics for a Long Baseline Neutrino Detector Alfons Weber STFC & University of Oxford ν

2 Dec 2007Alfons Weber2 Issues Introduction State of the Art MINOS/OPERA NOVA T2K/MINERVA Requirements physics photo detectors R&D needs

3 Dec 2007Alfons Weber3 There are N Detectors At least 2N different electronics have been used to read them out No unique solution Solutions have been adapted from existing ASICS driven by cost, timescale, physics. not ideal But get the job done Introduction

4 Dec 2007Alfons Weber4 Tensions Near Detectors high rate beam synchronisation limited channel count Far Detectors low rate no beam signal available huge channel count Performance high dynamic range, precise timestamps 100% lifetime low cost

5 Dec 2007Alfons Weber5 What the following is about Electronics, need to integrate with DAQ photo detectors Photo-detectors PMT, APD, MPPC DAQ PCs? Detector scintillator with WLS fibre large PMT arrays?

6 Dec 2007Alfons Weber6 Solution: MINOS ND Based on existing QIE ASIC dead-timeless for up to 20 μsec (spill) QIEFADCFIFO Input current Analog Voltage 8-bit FADC value 3 bit range code 2 bit CAP-ID code CAP-ID: QIE has 4 copies of current divider/integrator  4 capacitor IDs Every channel in the detector (9240) produces, every 18.87 nsec: {FADC, RANGE, CAP-ID} 1.4fC lowest count sensitivity, 16-bit effective dynamic range Input charge QIE output voltage

7 Dec 2007Alfons Weber7 Solution: MINOS ND (II) Front End (MINDER/MENUS) Readout (MASTER) Data Acquisition Analogue PMT Pulse Fast readout of digital data in response to trigger PVIC Transfers to PCs Timing System 44 MINDER crates 8 MASTER crates

8 Dec 2007Alfons Weber8 Solution: MINOS FD/OPERA MINOS developed an ASIC chip for PMT readout with IDEAS 32 channels VA32_HDR11 shaping amplification sample & hold output driver to ADC Excellent product fast shaping 500 nsec noise < 2 fC linear> 20 pC 6 ASICs multiplexed onto 1 ADC

9 Dec 2007Alfons Weber9 Trigger-less DAQ system ASIC close to PMT ADC in VME crate fast PVIC-bus to PC trigger farm search for hits correlated in space and time Timing System –Absolute time from GPS (  t abs = 200 nsec) –optical distribute along large detector (  t rel = 4 nsec) Solution: MINOS FD (system)

10 Dec 2007Alfons Weber10 Solution: T2K/280m & MINERVA 8 (15) batches Separated by 540 (241) nsec charge integrated in batches Bunch Structure Spill Structure 58ns 540ns 58ns 540ns 58ns 540ns 58ns 540ns 58ns 540ns 58ns 540ns 58ns 540ns 58ns 2-3.53s 4.2µs integrationreset Chip Time Structure 2-3.53s

11 Dec 2007Alfons Weber11 preamp very simplified – neglecting features not relevant to ND280 operation integrate/reset gain = 1 or 4 gain adjust 1,2,3,…8 x10 V th analogue pipeline disc. O/P Q in discriminator 1pF 3pF reset TRIP-t Front-end architecture only preamp gain affects signal feeding discriminator no fine control (x1 or x4) discriminator threshold V th common to all channels on chip analogue bias settings gain, V th, etc. programmable via serial interface

12 Dec 2007Alfons Weber12 SiPM0 TFB0 … SiPM63SiPM0 TFB1 … SiPM63SiPM0 TFB47 … SiPM63 … RMM0 TPS Power distribution Clk & trg data CTM Trigger Primitives MCM Cosmic trigger Spill trig & # GPS 1Hz/100MHz (Acc. RF) Clk & trg FPN Gigabit/ Ethernet Acronyms: TFB: TRIP-t front-end board RMM:r/o merger module CTM:global trigger module MCM:master clock module SCM:slave clock module TPS:TRIP-t power supply FPN:front-end proc. node (PC) SCM Special trigger Clk & trg Gigabit/ Ethernet Clk & trg Solution: T2K (System Overview)

13 Dec 2007Alfons Weber13

14 Dec 2007Alfons Weber14

15 Dec 2007Alfons Weber15 Solution: NOvA

16 Dec 2007Alfons Weber16 Common Thread Different solutions for near and far detectors developed around different existing ASICs heavy use of FPGAs huge variation in cost $20 - $300 per channel DAQ and electronics can’t be developed independently later solutions move towards commercial back ends

17 Dec 2007Alfons Weber17 Requirements high QE photo detectors bigger detectors  cheaper low noise electronics low readout thresholds  bigger detectors dynamic range limited? 1:1000 Timing O(1nsec) low trigger threshold low and high rate environment

18 Dec 2007Alfons Weber18 Requirements (II) Will take a long time for community to settle on detector photo detector requirements Try to develop multi-purpose ASIC test beam near detector external trigger, limited lifetime far detector cheap, scalable, ~100% lifetime, self-triggering

19 Dec 2007Alfons Weber19 Ingredients ADC 1:1000 TDC 1 nsec Trigger local/global clock distribution cheap HV supply 30-1000 V monitoring commercial interfaces

20 Dec 2007Alfons Weber20 The Pass Resume Performance is not leading edge Cost is main driving factor multi purpose device Work needed requirements capture design multi-purpose readout system Electronics DAQ Develop ASIC develop test system

21 Dec 2007Alfons Weber21 Who and Where? Who is driving this? which community physicists vs. electronics engineers Where can the work be done? major labs Universities Has to be user driven. Many questions, few answers.


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