1. Shift Registers
Module M11.1
Section 7.3

2. 4-Bit Shift Register

3. shift4.abl
MODULE Shift4
TITLE '4-bit Shift Register A. Student, 7/22/02'
DECLARATIONS
" INPUT PINS "
PB PIN 10; " push-button switch (clock)
Clear PIN 7; " Switch 2
Load PIN 11; " Switch 3
data_in PIN 70; " Switch 8
" OUTPUT PINS "
Q3..Q0 PIN 39,37,36,35 ISTYPE 'reg buffer'; " LED 5..8
Q = [Q3..Q0]; " 3-bit output vector

4. shift4.abl (cont’d) EQUATIONS Q.c = PB; Q0.d = !Clear & data_in;
Q1.d = !Clear & Q0;
Q2.d = !Clear & Q1;
Q3.d = !Clear & Q2;
END Shift4

5. CUPL Simulation
File
4shift.si

6. CUPL Simulation
File
4shift.si

7. CUPL Simulation
Output File

8. Ring Counter

9. ring4.abl MODULE Ring4 TITLE '4-bit Ring Counter A. Student, 7/22/02'
DECLARATIONS
" INPUT PINS "
PB PIN 10; " push-button switch (clock)
Clear PIN 7; " Switch 2
" OUTPUT PINS "
Q3..Q0 PIN 39,37,36,35 ISTYPE 'reg buffer'; " LED 5..8
Q = [Q3..Q0]; " 3-bit output vector

10. ring4.abl (cont’d) EQUATIONS Q.c = PB; Q0.d = !Clear & Q3;
Q3.d = !Clear & Q2 # Clear;
END Ring4

11. CUPL Simulation
File
ring4.si

12. CUPL Simulation
File
ring4.si

13. CUPL Simulation
Output File

14. Ring Counter

15. Johnson Counter

16. Exercise Detect input sequence 1101
din
fsm
clk
dout
clr
din
dout

17. Use Shift Register dout 1 1 1 din Q0 Q1 Q2 Q3 CLK D Q D Q D Q D Q CLK1 1
din Q0 Q1 Q2 Q3 D Q D Q D Q D Q
CLK !Q
CLK !Q
CLK !Q
CLK !Q
CLK

18. Lab 8 Johnson Counter & Random Number Generator
CLK D Q !Q Q3 Q2 Q1 Q0
Random Number Generator

19. Q3 Q2 Q1 Q0 C E F B
Q3 Q2 Q1 Q0 A D