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Bunch-by-Bunch Instrumentation Module Design Goals: –Unified conceptual design for all bunch-by-bunch instrumentation Beam position monitoring Bunch tune.

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Presentation on theme: "Bunch-by-Bunch Instrumentation Module Design Goals: –Unified conceptual design for all bunch-by-bunch instrumentation Beam position monitoring Bunch tune."— Presentation transcript:

1 Bunch-by-Bunch Instrumentation Module Design Goals: –Unified conceptual design for all bunch-by-bunch instrumentation Beam position monitoring Bunch tune monitoring Vertical beamsize monitoring –Maintain one software support structure for use by all modules Modular of communications components –Needs some cleanup Modular user interface –Server issues

2 Beam Position Monitor Base Requirements Turn-by-turn digitized data collection for single bunch –At present this does NOT imply turn-by-turn collection for all bunches –Strict minimum requirements on the data transfer method DSP mediated Hardware mediated –Since Ability to process sample sizes suitable for position and FFT measurements –FFT data depth of 8K turns for 50Hz measurement res –Position data depth of 1K turns for micron level resolution –Requirements are a major squeeze for existing DSP mem –Do we really need fast bunch-by-bunch update??? Presently transferring full spectrum when raw data would only be a factor of 2 overhead Original plan was to provide rapidly updating small window (or peak locations only) for tuning-type update rate – this is probably still a valid requirement –Need to refine HEP operating mode Tunes plus position How to maintain calibration Strong preference to have all functionality in a single DSP executable for ease of management –At present require both an FFT exe and a Position exe –Code space limits exceeded –Data space limits exceeded

3 Bunch-by-Bunch Vertical Beamsize Base Requirements Front End –32 channels – sub-divide into dual front-ends –Must route HV and low-voltage signals –Use turn-by-turn sampling Dynamic range provided largely by sampling depth Single turn signal is 0 – few hundred photons so proper choice of single gain setting and suitably precise ADC gives full dynamic range required –Go to 72 MHz parallel bunch sampling No interference with opposing beam PMT risetime <1ns so minimal bunch-to-bunch cross-talk with suitable bandwidth front end Interested in 2-turn sampling to probe dynamics. Does not make sense to have such samples far separated in time between bunches Saturation of PMT may limit number of bunches that can be simultaneously collected –Pockels Cell Gate –Alternatively, since noise level set by photon statistics, may be able to run PMT array at lowered voltage Requires directly pipelined memory since SHARC cannot transfer 32xN data to onboard memory at this rate Timing Board Requirements –72 MHz clock output –Global timing slew only needs to be 14 ns versus 2.56  s Digital Board Requirements –Indications are that we will need a “big” DSP to process 32 channel interference patterns from 45 bunches – move to TigerSHARC series DSP –Allow for connections to multiple front-ends

4 Front End Upgrades Raw Data Memory –BPM Readout Requirements with 72 MHz Sampling Time base different for each species, so would need 8 readout channels for full interleaved sampling. Preferably place multiple ADCs on single DVGA output Button Info: 45 bunches x 8K turns x 16 bits = 360K x 16 bits Pedestal Info: 5(?) bunches x 8K turns x 16 bits = 40K x 16 bits Phase Info: 1 word x 8K turns x 32 (28) bits = 16K x 16 bits IS61LV25616L: 256K x 16 bits 2 chips / channel / species (or could do 4K turns with 1 chip/channel/species) –Beamsize Readout Requirements with 72 MHz Sampling 45 bunches x 1K turns x 16 bits = 45K x 16 bits per channel Ped Info: 5(?) bunches x 1K turns x 16 bits = 5K x 16 bits per ch –Add temperature monitoring on front end board (needs to have sufficient resolution)

5 Front End Checks Signal Tails –Possible inductor issue? How to introduce a calibration pulse –What is a reasonable pulseheight calibration method? –How to Saturation problems??? –What happens if one species of bunch on a button saturates the DVGA prior to measuring a counter- going bunch? –Can this explain any of our IRBPM results? –Test by timing scan with 2 bunches in machine? –Test by IRBPM measurements with single bunch in machine vs measurements with two counter- rotating bunches? Thermal stability –Need to plot time-history of pedestals –Need to add automatic pedestal monitoring


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