1. FRUGAL IP LOOKUP BASED ON A PARALLEL SEARCH
Author: Zoran Cica and Aleksandra Smiljanic
Publisher/Conf.: IEEE Workshop on High Performance Switching and Routing, HPSR 2009
Speaker: Han-Jhen Guo
Date:

2. OUTLINE Parallelized Frugal Lookup (PFL) Algorithm Performance
Idea Introduction
Overall Architecture
Level Module
Performance

3. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - IDEA INTRODUCTION
Based on the multibit trie
stride = 8 → IPv4 = 4 levels; IPv6 = 16 levels
the operation of a subtree in each level is performed in parallel
Subtree Prefix
the sequence of bits that leads to that subtree

4. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - IDEA INTRODUCTION
eg. search (IP = , stride = 3)
find the involved subtrees each level
find the matched prefix(es)
get the nexthop information of
the longest matched prefix
0* (C)
110* (A)
110
* (B)

5. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - IDEA INTRODUCTION
eg. add (IP = , len. = 8, stride = 3)
find the involved subtrees each level
update the subtree by prefix length of
inserted prefix
update the nexthop information
110
* (B)

6. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - OVERALL ARCHITECTURE
perform the search and update at the corresponding levels
selects the best solution found by the level modules
holds the nexthop information

7. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - OVERALL ARCHITECTURE
eg. search (IP = , stride = 3)
0* (F) 1
110* (A)
110
1, 0, 1, 0 for i= 1…4 B
Read
* (B) B

8. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - OVERALL ARCHITECTURE
eg. add (IP = , len. = 8, stride = 3) 1
110 B
0, 0, 1, 0 for i= 1…4
Write
* (B) B

9. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - LEVEL MODULE

10. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - LEVEL MODULE
eg. search (IP = , stride = 3)
(level module)3
110001
110100
110110
110* (A)
comparator
010
* (C)
* (E)
* (B)
* (D) 2
共 14 個 nodes → subtree vector = 14 bits 1 1
addr(B)

11. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - LEVEL MODULE
eg. add (IP = , len. = 8, stride = 3)
(level module)3
110001
110100
110110
110* (A)
comparator
010
* (C)
* (E)
* (B)
* (D) 2
prefix len = 8 (7 <= 8 <= 9) 8 1 1
addr(B)

12. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - LEVEL MODULE
For saving memory (resources are not used for an empty subtree)
associating one counter to each register
for counting the number of prefixes in each subtree with subtree prefix to the register

13. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - LEVEL MODULE
eg. add (IP = , len. = 8, stride = 3)
(level module)3 1 1 1
110001
110100
110110
110* (A)
comparator
010
* (C)
* (B)
* (D) 2
共 14 個 nodes → subtree vector = 14 bits
prefix len = 8 (7 <= 8 <= 9) 8 1 1
addr(B)

14. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - PERFORMANCE
Software
Quartus II 8.1
Chip
Altera Cyclone II and III families, for IPv4 and IPv6 addresses, respectively
Table
32.5K ~ 134K entries

15. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - PERFORMANCE
PFL for IPv4
Modified PFL for IPv4
only the leaf nodes of the subtrees are memorized
about 50% memory off
lead to slower update speed (may update more than one leaf nodes with a update operation)

16. PARALLELIZED FRUGAL LOOKUP (PFL) ALGORITHM - PERFORMANCE
PFL for IPv6
real-life table (1.6K entries): 60M lookups/sec
expand table: 45.37M lookups/sec

17. Thanks for
your listening!