Presentation is loading. Please wait.

Presentation is loading. Please wait.

UNIT-III Pin Diagram Of 8086

Similar presentations


Presentation on theme: "UNIT-III Pin Diagram Of 8086"— Presentation transcript:

1 UNIT-III Pin Diagram Of 8086
Minimum Mode And Maximum Mode Of Operation. Timing Diagram Memory Interfacing To 8086 (Static RAM & EPROM). Need For DMA. DMA Data Transfer Method. Interfacing With 8257.

2 Fig 3.1 Pin diagram of 8086

3 Fig 3.2 Minimum mode pin diagram of 8086
Minimum mode of 8086 • When the Minimum mode operation is selected, the 8086 provides all control signals needed to implement the memory and I/O interface. Fig 3.2 Minimum mode pin diagram of 8086

4 Fig 3.3 Write cycle timing diagram of 8086 in Minimum mode

5 Fig 3.4 Maximum mode 8086 system
8086 in Maximum mode Fig 3.4 Maximum mode 8086 system

6 Fig 3.5 General bus operation cycle in Maximum mode

7 Memory interfacing Fig 3.6 Address mapping

8 Fig 3.7 Memory interfacing to 8086

9 DIRECT MEMORY ACCESS For the applications that require huge amounts of data transfer to memory from a magnetic or optical disk a dedicated hardware device called DMA controller is used. The DMA controller temporarily borrows the address bus ,data bus and control bus from the microprocessor and transfers the data bytes directly from the disk controller to a series of memory locations. Some DMA devices even can do memory to memory transfers.

10 Fig 3.8 Block diagram of DMA Interfacing

11 Fig 3.9 Block diagram that shows DMA data transfer scheme

12 Fig 3.10 Pin diagram of 8257 DMA controller

13 Fig 3.11 Functional block diagram of 8257

14 Fig 3.12 Mode set register Bit format
Fig 3.13 Status register Bit format

15 Table 3.1 8257 Register selection

16 Fig 3.14 Interfacing 8257 with 8086


Download ppt "UNIT-III Pin Diagram Of 8086"

Similar presentations


Ads by Google