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ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN
Dr. Shi Dept. of Electrical and Computer Engineering
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SHIFT REGISTERS
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Overview Multiple flip flops can be combined to form a data register
Shift registers allow data to be transported one bit at a time Registers also allow for parallel transfer Many bits transferred at the same time Shift registers can be used with adders to build arithmetic units Remember: most digital hardware can be built from combinational logic (and, or, invert) and flip flops Basic components of most computers
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Register with Parallel Load
Register: Group of Flip-Flops Ex: D Flip-Flops Holds a Word of Data Loads in Parallel on Clock Transition Asynchronous Clear (Reset)
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Register with Load Control
New data loaded on next positive clock edge Load Control = 0 Old data reloaded on next positive clock edge
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Shift Registers Cascade chain of Flip-Flops Bits travel on Clock edges
Serial in – Serial out, can also have parallel load / read
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Parallel Data Transfer
All data transfers on rising clock edge Data clocked into register Y
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Parallel versus Serial
Serial communications is defined as Provides a binary number as a sequence of binary digits, one after another, through one data line. Parallel communications Provides a binary number through multiple data lines at the same time.
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Shift register application
Parallel-to-serial conversion for serial transmission parallel outputs parallel inputs serial transmission
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Serial Transfer Data transfer one bit at a time
Data loopback for register A Time T0 T1 T2 T3 T4 Reg A 1011 1101 1110 0111 Reg B 0011 1001 1100 0110 1011
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Serial Transfer of Data
Transfer from register X to register Y (negative clock edges for this example)
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Serial Addition (D Flip-Flop)
Slower than parallel Low cost Share fast hardware on slow data
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Serial Addition (D Flip-Flop)
Only one full adder Reused for each bit Start with low-order bit addition Note that carry (Q) is saved Add multiple values. New values placed in shift register B
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Serial Addition (D Flip-Flop)
Shift control used to stop addition Generally not a good idea to gate the clock Shift register can be of arbitrary length FA is built from combin. logic
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Universal Shift Register
Clear Clock Shift Right Left Load Read Control
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A clear control to clear the register to 0.
A clock input to synchronize the operations A shift right control to enable the shift right operation and the serial input and output lines associated with the shift right A shift left control to enable the shift right operation and the serial input and output lines associated with the shift left A || load control enables the || transfer and the n input lines associated with the paralloel transfer N parallel output lines A control state that does not change the state.
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Summary Shift registers can be combined together to allow for data transfer Serial transfer used in modems and computer peripherals (e.g. mouse) D flip flops allow for a simple design Data clocked in during clock transition (rising or falling edge) Serial addition takes less chip area but is slow Universal shift register allows for many operations The register is programmable. It allows for different operations at different times Next time: counters (circuits that count!)
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counters A counter is a device which stores (and sometimes displays) the number of times a particular event or process has occurred. A register that goes through a prescribed sequence3 of states upon the application of input pulses is called a counter. 1. Ripple counters 2. Synchronous counters
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Ripple counters The FF output transition serves as a source for triggering other flip flops. Binary Ripple counter:
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4 bit binary ripple counter
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