Presentation is loading. Please wait.

Presentation is loading. Please wait.

HVCMOS Detectors – Overview

Similar presentations


Presentation on theme: "HVCMOS Detectors – Overview"— Presentation transcript:

1 HVCMOS Detectors – Overview
High-voltage CMOS (HVCMOS) pixel sensors are depleted active pixel sensors implemented in standard CMOS processes. Applications Mu3e Together with University of Heidelberg we have developed a 4 mm x 4 mm large detector prototype MuPix (monolithic HVCMOS detector) as a system on a chip in AMS 180 nm technology. ATLAS pixels: Seven small test detectors designed; five of them in 180 nm- and two in 350 nm AMS technology. Smart HVCMOS sensor readout with the pixel readout ASIC FEI4. Capacitive signal transmission used instead bump bonds. ATLAS strips: Together with the University of Santa Cruz we are developing HVCMOS sensors (AMS 350nm technology) that can be alternative to the strip sensors for ATLAS. CLIC: HVCMOS active sensor capacitively coupled to CLICPIX ASIC – 25µm x 25µm pixels. Previous ALAS pixels results: Efficiency of more than 99 % has been measured by the University of Geneva with unirradiated chips (capacitively coupled pixel detector) and 96% with the chips irradiated to 1015 neq/cm2 with neutrons. Test beam has been performed on small samples. Time resolution still needs to be improved. About 95% of the signals are detected within 100 ns when irradiated chips are measured. The time uncertainty is caused by the time walk effect. HVCMOS detector is based on the triple-well structure: A deep n-well in p-substrate is used as charge-collecting electrode; it is reversely biased with respect to the substrate. The entire CMOS pixel electronics are placed inside the deep n-well. Efficiency of more than 99 % has been measured by University of Geneva with unirradiated chips and 96% with the chips irradiated to 1015 neq/cm2 with neutrons

2 New Results Within HVCMOS pixel- and strip collaborations we are planning several engineering runs in 350nm and 180nm technologies with increased substrate resistivity. All the results so far have been achieved with the standard substrate of 20 Ω cm, different nonstandard substrates 80 Ωcm – 2 kΩcm will be tested within the engineering runs. As preparation for the engineering runs, four test chips have been designed. CCPDv5 (pixels AMS 180nm), H35CCPDv1/v2 (pixels AMS 350nm) and HVStripv1 (strips AMS 350nm) HVStripV1 results: Strontium-90 signal after proton irradiation to 2 x 1015neq/cm2 ~ 3600e. Signal to noise ratio after proton irradiation ~ 20. H35CCPDv2 results: Time walk compensation works: for signals > 970e, time walk is <10ns. Still to be tested on matrix level. 25ns 70ns Comparator response to signals from 720e to 3800e Amplifier response to signals from 720e to 3800e Spectrum of beta particle signals when a HVStripV1, irradiated to 2 x 1015neq/cm2 is exposed to Sr-90 source. Calibration x-ray spectra are also shown.

3 Summary We are developing HVCMOS sensors for Mu3e experiment, ATLAS pixels and strips, CLIC. Several novel concepts used: smart diode, CCPD, time walk compensation, constant delay multiplexer. Previous results: Before irradiation, detection efficiency of > 99% has been measured with all pixel types. After irradiation to ~1015 neq/cm2 efficiency is still high (96%), time resolution is limited by the time walk effect to 100ns (ATLAS CCPD pixels), novel comparator can cope with this problem. We are planning several engineering runs on high resistive substrates (80 Ωcm – 2 kΩcm) in AMS 180- and 350nm technologies. The use of high resistive substrates can improve signal. Several small test detectors on the standard substrate (20 Ωcm) have been produced, they contain the circuits we will use on larger prototypes. Test results on small detectors: Radiation tolerance of AMS 350nm process have been demonstrated, all circuits work as expected.


Download ppt "HVCMOS Detectors – Overview"

Similar presentations


Ads by Google