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System Integrator for National Instruments Rory Cox (MSc Eng 1972, BSc Eng 1970) Riordan Cox and Associates Pty Ltd based in Melbourne, Australia Testing, Monitoring and Control Engineering
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Optical Position Measurement X and Y sample taken over 2 mSecs Note that the cyclic variation is exactly 11 kHz and the movement is about 50 um on the X axis and 15 um on the Y axis Hamamatsu S1300 PSD: The position sensitive detector (pink surround) measures the beam stability. It is located at right angles to the beam line.
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COTS Technology for Big Physics Jeremy Taylor Strategic Business Manager National Instruments Oceania
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The National Instruments Vision “To do for test and measurement what the spreadsheet did for financial analysis.” Virtual Instrumentation
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The National Instruments Vision, Evolved… Graphical System Design Real-time Measurements Embedded Monitoring Hardware-in-the-loop Real-Time Math Diagnostic & Measurement Data Acquisition Automated Test Reconfigurable Instruments Industrial & Embedded Industrial Control (PAC) Machine Control Electronic Devices Code Generation “To do for embedded what the PC did for the desktop.” “To do for test and measurement what the spreadsheet did for financial analysis.”
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LEGO ® MINDSTORMS ® NXT “the smartest, coolest toy of the year” CERN Large Hadron Collider “the most powerful instrument on earth” Graphical System Design
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Diversity of Applications ElectronicsSemiconductors Computers Reuse of Technology Advanced Research & Big Physics Petrochemical Food Processing Textiles Automotive Telecom ATE Military/Aerospace
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High-Level Design Models Data Flow C Code Textual MathSimulationStatechart Real-Time FPGA Microprocessors Desktop Graphical System Design Platform PXIPC/Mac/LinuxFlexRIOCompactRIOCustom
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9 Users can assign and lock code to specific cores Deterministic Multithreading in LabVIEW Real-Time
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Max Planck Institute Plasma Diagnostics & Control with NI LabVIEW RT LabVIEW on an eight-core real-time system “…with LabVIEW, we obtained a 20X processing speed-up on an octal-core processor machine over a single-core processor…” Louis Giannone Lead Project Researcher Max Planck Institute
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LV RT RT Hypervisor MI, DAQ, etc. Linux Support to NI Real-Time Hypervisor Program I/O through LabVIEW RT High performance communication between OSes: up to 1 GB/s Linux is “face” of the system Develop Real-Time code on Windows Develop host code on Linux Linux
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Universal Driver NI RT drivers run on Linux Supports x86 based systems Best solution for Linux desktop users Early prototypes working Beta to be available: Q3, 2010 PharLap Process Redirection Layer DAQmx (API) RIO (API) XNET (API) Hardware DAQmx (driver) RIO (driver) XNET (driver) Application
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Open Architecture Controls standards –EPICS, TANGO, CORBA Connectivity to different devices –OPC, Modbus, TCP/IP, UDP, EtherCAT, Serial Flexibility –Windows, RTOS, FPGA
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Integrating EPICS and LabVIEW LabVIEW as a Client Presentation Analysis Control IOC (I/O Controller) I/O HW EPICS Client IOC (I/O Controller) I/O HW LabVIEW as a Server Interface to hardware Real-time control Access to FPGA Channel Access
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LabVIEW EPICS Server NEW in LabVIEW 2009 –Support for Channel Access Server Windows Real-Time OS – VxWorks & Pharlap –Can run on PXI and CompactRIO Custom option for CompactRIO –Run full EPICS IOC Server side by side with LabVIEW Real-Time
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BiRa Power Supply 16 channels of high precision bipolar DC power Mainly used for corrector magnets in particle accelerators Running LabVIEW EPICS CA Server on an embedded real-time controller
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PXI: COTS Instrumentation Platform DAQ and Control: Multifunction I/O FPGA/Reconfigurable I/O Digital I/O Analog Input/Output Vision and Motion Counter/Timers Instruments: Oscilloscopes Digital Waveform Generator/Analyzers Digital Multimeters Signal Generators Switching RF Signal Generation and Analysis Interfaces: GPIB, USB, LAN SCSI + Enet Boundary Scan/JTAG CAN + DeviceNet RS232/RS485 VXI/VME More than 1,500 PXI Products from More than 70 Vendors
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Industry’s highest-resolution digitizer Flexible resolution digitizers – up to - 114 dBc SFDR Industry’s fastest, most accurate 7½-digit DMM Highest-channel-count dynamic signal acquisition 5,000 dynamic signal channels to 0.01 degree Precision DC sources Power supplies and source measure units with nanoamp precision High-speed digital waveform generation/acquisition Clock rates up to 200 MHz, data rates as high as 400 Mb/s RF signal acquisition/generation Up to 6.6 GHz generation and 26.5 GHz acquisition with more than 50 MHz bandwidth Modular Instrumentation: DC to 26.5 GHz
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PXImc
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ISIS Synchrotron, Rutherford Appleton Labs Beam data acquisition and analysis Beam loss monitoring Beam position monitoring Multichannel profile monitoring –Hardware based on PXI platform High speed digitizers Timing and synchronization –LabVIEW based control system and process display data Bryan Jones and Sarah Whitehead, ISIS - Science and Technology Facilities Council, UK
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Czech Institute of Plasma Physics Thomson scattering system Synchronized high speed data acquisition –92ch running at 1GS/s –Tight synchronization over 3 PXI chassis –Skew < 500 ps
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NI 518x: Tektronix Technology … in PXIe 20 GHz, 50 GS/s oscilloscope Tektronix Custom ADC ASIC NI 518x > 3 GHz >10 GS/s (1-ch), > 5 GS/s (2-ch) 16 MB/ch std. 512 MB/ch opt. 2 (50Ω, SMA)
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CPU Performance (GFLOPs) FPGA Performance (GMACs) 19972001200220042005 20062009 1999 5 50 500 5,000 5 50 500 5,000 FPGAs CPUs Parallel Architectures Drive Performance
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Building Custom Hardware using FPGAs Custom Analog I/O Multiple Scan Rates Custom Analog Triggering Counters Custom Counters PWM Clocks Custom Timing and Synchronization Built-in IP Processing Blocks
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CERN Collimator Alignment 550+ axes of motion Across 27 km distance The jaws have to be positioned with an accuracy which is a fraction of the beam size (200μm) Synchronized to –< 5ms drift over 15 minutes –Maximum jitter in μs
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NI FlexRIO Data transfer Synchronization Clocking/triggers Power/cooling PXI PlatformNI FlexRIO FPGA Module Virtex-5 FPGA 132 digital I/O lines Up to 512 MB of DRAM Peer-to-peer data streaming NI FlexRIO Adapter Module Interchangeable I/O Digital or analog NI FlexRIO Adapter Module Development Kit (MDK) PXI/PXIe
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Xilinx Virtex 5 FPGA Socketed CLIP LabVIEW FPGA VI DRAM Memory PXI Bus Socketed CLIP CLIP Custom Front-End … Custom Module Development
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NI FlexRIO Peer-to-Peer Architecture >800 MB/s one-way >700 MB/s both ways ~10 us latency Up to 16 streams per FPGA
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NI CompactRIO Real-Time Processor Reconfigurable FPGA I/O Modules Reconfigurable FPGA for high-speed and custom I/O timing, triggering, control Real-Time Processor for deterministic, stand-alone operation, logging and analysis I/O Modules with built-in signal conditioning for connection to sensors/actuators Extreme Ruggedness -40 to 70 °C temperature range 50g shock, 5g vibration Low Power Consumption 9 to 35 VDC power, 7-10 W typical
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Over 60 NI and 3rd Party C Series Modules Analog Input ― Up to 250 kS/s, simultaneous sampling ― 4, 8, 16, and 32-ch options ― Built-in signal condition for sensors ― Strain gages, accelerometers, thermocouples, RTDs ― Up to ± 60 V, ±20 mA ― 12, 16 and 24-bit resolution ― Available ch-to-ch isolation Analog Output ― Up to100 kS/s simultaneous updating ― Up to 16-ch per module ― ±10 V, ±20 mA ― Isolation Digital I/O ―Up to 10 MHz timing ―Counter/timer, PWM ―8 and 32-channel options ―5V/TTL, 12/24/48 V logic levels Specialty ―2-port CAN modules ―Brushed DC servo motor drive Third Party Modules ―LIN, Profibus, WLAN 802.11, MIL- 1553, ARINC-429, GPS, and more
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Los Alamos LANSCE Ongoing migration to a cRIO system with embedded EPICS –12 binary outputs –36 binary inputs –12 analog inputs – 5 stepper motor channels Full IOC functionality allows access to all record fields and EPICS utilities Maximum flexibility for partitioning the problem –LabVIEW for beam diagnostic –EPICS for industrial control
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Generate Signals Time-Based Signal-Based Share Physical Clocks / Triggers Share Time … Ethernet (1588) IRIG GPS Etc. Event vs. Time-Based Synchronization
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Event-based Time-based GPS IEEE-1588 IRIG-B 10 -12 sec Precision sec 10 -3 sec 10 -6 sec 10 -9 sec 10 -2 m10 0 m Proximity 10 1 m10 2 m10 3 m10 4 m10 5 mGlobal<10 -4 m On-chip PXI Multichassis PXI Synchronization Technologies
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Collaboration: Timing and Sync Products Greenfield Technology –8 Channel PXI Digital Delay Generator –4 high precision delays 1ps resolution, <50ps rms jitter –4 auxiliary delays 5ns resolution, <100ps rms jitter Available on the front panel and on PXI Trig Micro-Research Finland –PXI Event Generator/Event Receiver –Working on a cRIO Event Receiver
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NI and CERN: White Rabbit Partnering with CERN in developing White Rabbit (WR) Performance – Distance: > 10 km – Scale: > 2000 nodes – Accuracy: < 1ns skew, < 100 ps jitter Compensates for propagation delay (cable length, temperature variation, etc.) Leverage Industry standards (802.x, IEEE 1588, SyncE) –Gigabit Ethernet communication with deterministic capability Generally Applicable Leverage for future PXIe modules
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