CAM Content Addressable Memory For TAG look-up in a Fully-Associative Cache

Fully Associative Cache 1 Tagin == V Tag0 Data0 == V Tag1 Data1 == V Tag15 Data15

CAM 1 Tagin Data RAM == V Tag0 Data0 == V Tag1 Data1 == V Tag15 Data15

Tag search Using CAM CAM: Content Addressable Memory Input: Data Output: Address It searches for the content (input data) and provides the address of the location with that content Tag search using CAM Input: Tag portion of the block address requested Output: One hot coded or encoded binary address of where the tag is found => i.e. the address of the data in the data RAM

Tag search using CAM At most one match signal is high == Match 0 V Tag0 == == Match 1 Tag in Tag in V Tag1 At most one match signal is high Match signal determines the correct line in DATA RAM One hot encoded address for Data RAM RE == Match 15 WE V Tag15

Interfacing with Data RAM CAM 16 X 8 Use binary encoding to generate address from Tag RAM Use address to fetch data from Data RAM (Hit == 1) => Address is valid (Hit == 0) => Address is invalid Tag In Addr 8 4 RE Hit 1 Addr Data RAM 64 X 32 Addr Data RAM 16 X 32 Data Data 4 4 32 32 2 Word Field Data RAM with one word/block Data RAM with four words/block

Updating TAG RAM Tag RAM should be updated on a cache miss Write Addr CAM 16 X 8 Tag RAM should be updated on a cache miss Use Write Enable Signal Input: Location to write Input: Tag to be written 4 Addr WE 4 8 Tag In Hit 1 1 RE Note: Address to write can be one of the empty locations address if the cache is not full. If the cache is full, the “Victim” address is chosen using either RANDOM replacement algorithm or LRU (Least Recently Used) replacement algorithm. In a Write-back cache, if the victim block is dirty, it should first be copied to the MM. Then Data is written into the Data RAM while Tag (along with Valid-bit == 1) is written into the CAM.