Nano-Electronics and Nano- technology A course presented by S. Mohajerzadeh, Department of Electrical and Computer Eng, University of Tehran.

Slides:



Advertisements
Similar presentations
Lecture Metal-Oxide-Semiconductor (MOS) Field-Effect Transistors (FET) MOSFET Introduction 1.
Advertisements

6.1 Transistor Operation 6.2 The Junction FET
CHAPTER 4 CONDUCTION IN SEMICONDUCTORS
Lecture #5 OUTLINE Intrinsic Fermi level Determination of E F Degenerately doped semiconductor Carrier properties Carrier drift Read: Sections 2.5, 3.1.
Course code: EE4209 Md. Nur Kutubul Alam Department of EEE KUET High Electron Mobility Transistor (HEMT)
Chapter 6 The Field Effect Transistor
EE466: VLSI Design Lecture 02 Non Ideal Effects in MOSFETs.
Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 12 Lecture 12: MOS Transistor Models Prof. Niknejad.
CHAPTER 3 Introduction to the Quantum Theory of Solids
Carrier Transport Phenomena
Introduction to CMOS VLSI Design MOS Behavior in DSM.
Introduction to VLSI Circuits and Systems, NCUT 2007 Chapter 6 Electrical Characteristic of MOSFETs Introduction to VLSI Circuits and Systems 積體電路概論 賴秉樑.
VLSI Design Lecture 3a: Nonideal Transistors
Lecture 15 OUTLINE MOSFET structure & operation (qualitative)
EE415 VLSI Design The Devices: MOS Transistor [Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]
Lecture #16 OUTLINE Diode analysis and applications continued
Week 8b OUTLINE Using pn-diodes to isolate transistors in an IC
Spring 2007EE130 Lecture 36, Slide 1 Lecture #36 ANNOUNCEMENTS Updated information for Term Project was posted on 4/14 Reminder: Coffee Hour today at ~4PM!
Spring 2007EE130 Lecture 38, Slide 1 Lecture #38 OUTLINE The MOSFET: Bulk-charge theory Body effect parameter Channel length modulation parameter PMOSFET.
EE105 Fall 2007Lecture 16, Slide 1Prof. Liu, UC Berkeley Lecture 16 OUTLINE MOS capacitor (cont’d) – Effect of channel-to-body bias – Small-signal capacitance.
MOS Capacitors ECE Some Classes of Field Effect Transistors Metal-Oxide-Semiconductor Field Effect Transistor ▫ MOSFET, which will be the type that.
Metal-Oxide-Semiconductor Field Effect Transistors
Lecture 19 OUTLINE The MOSFET: Structure and operation
Semiconductor Devices III Physics 355. Transistors in CPUs Moore’s Law (1965): the number of components in an integrated circuit will double every year;
EE130/230A Discussion 11 Peng Zheng.
EE 466: VLSI Design Lecture 03.
Lecture 2 Chapter 2 MOS Transistors. Voltage along the channel V(y) = the voltage at a distance y along the channel V(y) is constrained by the following.
Chapter 6 Field Effect Transistors 6.1 Transistor Operation 6.2 The Junction FET 6.3 The Metal-Semiconductor FET 6.4 The Metal-Insulator-Semiconductor.
ECE 342 Electronic Circuits 2. MOS Transistors
EE213 VLSI Design S Daniels Channel Current = Rate of Flow of Charge I ds = Q/τ sd Derive transit time τ sd τ sd = channel length (L) / carrier velocity.
Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 CHAPTER 2 WEEK 7 CHAPTER 2 MOSFETS I-V CHARACTERISTICS CHAPTER 2.
Introduction to Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) Chapter 7, Anderson and Anderson.
Chapter 5: Field Effect Transistor
Introduction to FinFet
EXAMPLE 6.1 OBJECTIVE Fp = 0.288 V
DMT121 – ELECTRONIC DEVICES
1 Fundamentals of Microelectronics  CH1 Why Microelectronics?  CH2 Basic Physics of Semiconductors  CH3 Diode Circuits  CH4 Physics of Bipolar Transistors.
Numerical Boltzmann/Spherical Harmonic Device CAD Overview and Goals Overview: Further develop and apply the Numerical Boltzmann/Spherical Harmonic method.
NMOS PMOS. K-Map of NAND gate CMOS Realization of NAND gate.
Short Channel Effects in MOSFET
ECE 4339 L. Trombetta ECE 4339: Physical Principles of Solid State Devices Len Trombetta Summer 2007 Chapters 16-17: MOS Introduction and MOSFET Basics.
EEE 3394 Electronic Materials
Junction Capacitances The n + regions forms a number of planar pn-junctions with the surrounding p-type substrate numbered 1-5 on the diagram. Planar junctions.
ECE442: Digital ElectronicsCSUN, Spring-2010-Zahid MOS Transistor ECE442: Digital Electronics.
Structure and Operation of MOS Transistor
Advanced Drift Diffusion Device Simulator for 6H and 4H-SiC MOSFETs
HO #3: ELEN Review MOS TransistorsPage 1S. Saha Long Channel MOS Transistors The theory developed for MOS capacitor (HO #2) can be directly extended.
Short-channel Effects in MOS transistors
BASICS OF SEMICONDUCTOR
The MOS Transistor Polysilicon Aluminum. The NMOS Transistor Cross Section n areas have been doped with donor ions (arsenic) of concentration N D - electrons.
MOSFET Current Voltage Characteristics Consider the cross-sectional view of an n-channel MOSFET operating in linear mode (picture below) We assume the.
EXAMPLE 2.2 OBJECTIVE Solution Comment
Metal-oxide-semiconductor field-effect transistors (MOSFETs) allow high density and low power dissipation. To reduce system cost and increase portability,
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 11: September 22, 2014 MOS Transistor.
Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 2, slide 1 Introduction to Electronic Circuit Design.
Field Effect Transistor (FET)
EE 466/586 VLSI Design Partha Pande School of EECS Washington State University
The MOS capacitor. (a) Physical structure of an n+-Si/SiO2/p-Si MOS capacitor, and (b) cross section (c) The energy band diagram under charge neutrality.
Fatemeh (Samira) Soltani University of Victoria June 11 th
EE130/230A Discussion 10 Peng Zheng.
Chap.1 Physics and Modelling of MOSFETs 반도체 연구실 신입생 세미나 박 장 표 2009 년 1 월 8 일.
Damu, 2008EGE535 Fall 08, Lecture 21 EGE535 Low Power VLSI Design Lecture #2 MOSFET Basics.
Lecture 20 OUTLINE The MOSFET (cont’d) Qualitative theory
Intro to Semiconductors and p-n junction devices
Introduction to Nanoheat; Aspel group
Lecture #5 OUTLINE Intrinsic Fermi level Determination of EF
Sung June Kim Chapter 19. MODERN FET STRUCTURES Sung June Kim
Lecture 20 OUTLINE The MOSFET (cont’d) Qualitative theory
Lecture #15 OUTLINE Diode analysis and applications continued
PN-JUNCTION.
Presentation transcript:

Nano-Electronics and Nano- technology A course presented by S. Mohajerzadeh, Department of Electrical and Computer Eng, University of Tehran

MOSFET Operation MOSFET is a four-terminal device, where the application of gate voltage creates a layer of “opposite” carriers called as “inversion” layer. MOSFET is a four-terminal device, where the application of gate voltage creates a layer of “opposite” carriers called as “inversion” layer. The amount of inversion and the total number of carriers generated and built-up in the channel depends on the applied gate voltage. The amount of inversion and the total number of carriers generated and built-up in the channel depends on the applied gate voltage. The presence of a voltage between two other terminals (source and drain) leads to a flow of current from the source side onto the drain. The presence of a voltage between two other terminals (source and drain) leads to a flow of current from the source side onto the drain. The amount of current depends both on V DS and V GS. After a certain value of V GS is passed (threshold voltage), the evolution of inversion layer is significant and current can flow between source and drain. The amount of current depends both on V DS and V GS. After a certain value of V GS is passed (threshold voltage), the evolution of inversion layer is significant and current can flow between source and drain. Increasing the drain voltage leads to “local” evacuation of the channel, called as pinch-off. Increasing the drain voltage leads to “local” evacuation of the channel, called as pinch-off. Further increase in the drain-source voltage will not have much effect in the current of the device (saturation regime). Further increase in the drain-source voltage will not have much effect in the current of the device (saturation regime). I DS =qC ox µ eff W/L (V GS -V T ) 2 µ eff is the effective carrier mobility of the inversion layer and C ox is ε/t ox. µ eff is the effective carrier mobility of the inversion layer and C ox is ε/t ox. For advanced devices, the electric permitivity must be high to allow the same amount of capacitance with a thicker oxide layer. Use of High “k” materials is inevitable! For advanced devices, the electric permitivity must be high to allow the same amount of capacitance with a thicker oxide layer. Use of High “k” materials is inevitable!

Operation of MOSFET

Ballistic Transistors When the dimensions of MOS devices shrink, the scattering of carrier through the channel reduces When the dimensions of MOS devices shrink, the scattering of carrier through the channel reduces Electrons can reach their ceiling velocity i.e. (2KT/πm*) 1/2 where m* is the effective mass of electrons in the solid. Electrons can reach their ceiling velocity i.e. (2KT/πm*) 1/2 where m* is the effective mass of electrons in the solid. At room temperatures this speed equals 10 8 cm/s. At room temperatures this speed equals 10 8 cm/s. Operation of the device is essentially the same as a velocity saturation regime of MOSFET. Operation of the device is essentially the same as a velocity saturation regime of MOSFET. Quantum mechanics must be exploited to give a proper insight about the mechanism of transport in such devices. Quantum mechanics must be exploited to give a proper insight about the mechanism of transport in such devices.

Nano-scale MOSFET When the dimensions becomes so small sub-bands evolve. When the dimensions becomes so small sub-bands evolve. Each sub-band is a result of geometry reduction where the electron behaves as a particle in a box in two or one dimensions. Each sub-band is a result of geometry reduction where the electron behaves as a particle in a box in two or one dimensions. The limitation by Q-M leads to discrete values of momentum and corresponding energy levels. The limitation by Q-M leads to discrete values of momentum and corresponding energy levels. In other directions, the behavior is more classic and variation can be considered small. In other directions, the behavior is more classic and variation can be considered small.

Nanoscale MOSFET E C, conduction band E C, conduction band E 1 and E 2 two split sub- bands due to quantum confinement E 1 and E 2 two split sub- bands due to quantum confinement E 1 and E 2 are constant, discrete energy levels of each state, E 1 and E 2 are constant, discrete energy levels of each state, E C is modulated, due to non-equilibrium condition in the solid (assuming an ideal solid under external voltages) E C is modulated, due to non-equilibrium condition in the solid (assuming an ideal solid under external voltages)

Fermi distribution function, gives the probability of finding a particle at energy level “E”. Fermi distribution function, gives the probability of finding a particle at energy level “E”. f(E)=(1+ exp ((E-E f )/KT))) -1 ≈ exp (E f -E)/KT f(E)=(1+ exp ((E-E f )/KT))) -1 ≈ exp (E f -E)/KT Considering the parabolic band structure (valid at low momentum’s) Considering the parabolic band structure (valid at low momentum’s) f(E) = exp ((E f – E c + E c –E)/KT) = exp ((E f –E c )/KT) exp (- ħ 2 k 2 /2m * KT) = exp ((E f –E c )/KT) exp (- m * v 2 /2KT) f(E) = exp ((E f – E c + E c –E)/KT) = exp ((E f –E c )/KT) exp (- ħ 2 k 2 /2m * KT) = exp ((E f –E c )/KT) exp (- m * v 2 /2KT) For a normal MOSFET device, the majority of carriers have velocities (energies) concentrated around zero and low enough (less than 10 7 cm/s) For a normal MOSFET device, the majority of carriers have velocities (energies) concentrated around zero and low enough (less than 10 7 cm/s)

Ballistic MOSFET For small devices, the scattering is minimized and the extensive electric field leads to higher velocities in x-direction For small devices, the scattering is minimized and the extensive electric field leads to higher velocities in x-direction Close to source, velocity shows a symmetrical distribution both in positive and negative direction, Close to source, velocity shows a symmetrical distribution both in positive and negative direction, At the top of the conduction band curve, the velocity is quite low. At the top of the conduction band curve, the velocity is quite low. At distances close to drain, the high speed peak (ballistic peak) is observed and in the drain, this situation becomes more significant. At distances close to drain, the high speed peak (ballistic peak) is observed and in the drain, this situation becomes more significant.

Velocity saturation In a standard MOSFET or under small biases, the velocity reaches its saturation limit and remains constant throughout channel. In a standard MOSFET or under small biases, the velocity reaches its saturation limit and remains constant throughout channel. By increasing the bias, the velocity overshoot is observed and ballistic peak is achieved. By increasing the bias, the velocity overshoot is observed and ballistic peak is achieved.

Natori’s Theory The positive k-states are populated by injection from the source according to the source Fermi level, E F, and the negative k-states are populated from the drain according to the drain Fermi level, E F - qV DS. The positive k-states are populated by injection from the source according to the source Fermi level, E F, and the negative k-states are populated from the drain according to the drain Fermi level, E F - qV DS. V DS = 0, the positive and negative states are equally occupied, the average velocity is zero, and I D = 0. V DS = 0, the positive and negative states are equally occupied, the average velocity is zero, and I D = 0. For small V DS, the drain Fermi level is lowered, fewer negative k- states are occupied, the net velocity is positive. For small V DS, the drain Fermi level is lowered, fewer negative k- states are occupied, the net velocity is positive. For large V DS, the negative k-states are empty, the average velocity saturates at a value determined by the gate voltage, which determines the location of the Fermi level. For large V DS, the negative k-states are empty, the average velocity saturates at a value determined by the gate voltage, which determines the location of the Fermi level. In this case the drain current saturates at the so-called on-current. In this case the drain current saturates at the so-called on-current. n s + (E f ) – n s - (E f -qV DS )= Q(0)/q ≈ C ox (V GS – V T ) n s + (E f ) – n s - (E f -qV DS )= Q(0)/q ≈ C ox (V GS – V T ) This equation predicts the place of the Fermi level. The positive concentration is due to electrons flowing from source to drain and negative one is due to reverse flow. This equation predicts the place of the Fermi level. The positive concentration is due to electrons flowing from source to drain and negative one is due to reverse flow.

Current Characteristics I + (E f ) – I - (E f -qV DS )= I (V DS ) I + (E f ) – I - (E f -qV DS )= I (V DS ) Each electron travels with a speed of “v” which also depends on its energy. So, the total current depends both on velocity and density of the carriers. Each electron travels with a speed of “v” which also depends on its energy. So, the total current depends both on velocity and density of the carriers. I=qW( n s + (E f ) v + (E f ) – n s - (E f -qV DS ) v - (E f –qV DS ) ) I=qW( n s + (E f ) v + (E f ) – n s - (E f -qV DS ) v - (E f –qV DS ) ) I= WQ(0) v + (1 – (n s - /n s + )(v - /v + ))/(1 + n s - /n s + )) I= WQ(0) v + (1 – (n s - /n s + )(v - /v + ))/(1 + n s - /n s + )) Gate voltage controls the value of Q(0) through electrostatic potential of the MOS structure. Gate voltage controls the value of Q(0) through electrostatic potential of the MOS structure.

E-K representation

Non-Degenerate case n s + (0) = N 2D /2 ( exp (E f – E 1 (0))/KT)) n s + (0) = N 2D /2 ( exp (E f – E 1 (0))/KT)) n s - (0) = N 2D /2 (exp (E f –qV DS – E 1 (0)/KT)) n s - (0) = N 2D /2 (exp (E f –qV DS – E 1 (0)/KT)) I + =WJ + =Wqn s + (0) v + I + =WJ + =Wqn s + (0) v + I - = WJ - =Wqn s - (0) v - I - = WJ - =Wqn s - (0) v - In the case of ballistic transport, v + =v - = v T = (2KT/m*π) 1/2 In the case of ballistic transport, v + =v - = v T = (2KT/m*π) 1/2 The final current: The final current: I=qWn s (0) v T (1- exp (-qV D /kT))/(1+ exp (-qVD/KT) Where qn s (0) = C ox (V gs -V T )