LU and SEU testing at STAR and LBNL 88” cyclotron LU tests at STAR LU and SEU tests at the 88” cyclotron Test integration with IPHC Test plans IPHC – LBL phone meeting May 5, 2011

MS IPHC - LBL phone meeting, May 5, LU testing at STAR The electronics box contains: 8 LU protected regulation PS PCBs (each is polyfused) an NI DAQ6008 USB module a PCB with electronic switches a USB/fiber converter Monitored power: 2 × VDA 2 × VDD 2 × VMEM 1 × VREG

MS IPHC - LBL phone meeting, May 5, LU testing at STAR STAR

MS IPHC - LBL phone meeting, May 5, st (and so far the only) latch up (?) at VMEM Begin monitoring: 13 April 2011, ~12:00 pm (EDT) First registered event: 17 April 2011, ~9:00 pm (EDT) – Beam status at the time of the event No new events until now (May 5, 2011) (500 GeV p+p)

MS IPHC - LBL phone meeting, May 5, LU and SEU at 88” Test chamber Readout system Test PCB

MS IPHC - LBL phone meeting, May 5, LU and SEU at 88” cyclotron Status: – No progress in measurements since our last report (Nov. 29) – SEU monitoring firmware in a validation phase – No beam time scheduled; we expect to be on-call for beam availability – Integration of Ultimate into the upcoming set of tests

MS IPHC - LBL phone meeting, May 5, Test integration with IPHC During my visit at IPHC in February/March, Guy and I agreed on the interface between his memory test PCB and our setup: – Mounting holes (compatible with the existing fixture) – cable connectors (compatible with our setup) The test PCB will easily interface to our Xilinx FPGA board for SEU and LU monitoring

MS IPHC - LBL phone meeting, May 5, Test plans LU tests for Mimosa26 with 20 µm epi SEU tests for both Mimosa 26 chips (15 and 20 µm epi ) SEU for all ladder/MTB components SEU and LU for Ultimate Memory test structures from IPHC (if available) Time frame – undetermined at this time – Beam time at the cyclotron appears fully booked until January 2012 (some openings might become available)

MS IPHC - LBL phone meeting, May 5, That’s all for now …