BCID Reset T.Dai, H.Boterenbrood, E.Pasqualucci Mar. 26 th 2009 MDT JTAG and BCID/ECID Reset Meeting 1.History; 2.BCID of First Bunch.

In preparing LHC first beam, Thilo would like that it is possible trigger could be issued right after BCID reset (= no any inhibit of L1 trigger into BCID 1 and up). Due to CSM and AMT use same line to issue trigger and BCID/EVID resets with 3 ticks, trigger will be blocked at BCID=1,2 with old setting where BCID reset set BCID=0. A meeting was called for related personals.

Solutions Solution 1: Reprogram CSM to add addition delay in trigger to give different time for trigger and BCID/EVID resets (BCID/EVID resets will be issued right after receiving it, where trigger will be hold for several LHC clock ticks). Solution 2: changing the delay of the BCR signal in the TTCvi, by subtracting 15 bunch crossings. start the BCID count from -15 (involving different configuration of on-chamber electronics and TIM module), where 15 is maximum allowed in TIM module. In both solution, proper trigger inhibits must be applied to ATLAS trigger system.

Implementation Second solution was picked up since it only involves to modify configurations on MUON TTC system, TIM module and AMT chips. On May 26, 2008, the tests were done with different delay settings -9, -15 and -12. At end, delay of -12 LHC ticks was taken according to Thilo’s suggestion with following AMT settings: 1) Count roll over 0xDEB = 3563 (old value 0xFFF) 2) Coarse time offset 0x79 (old value 0x84) 3) Reject count offset 0xDBF (old value 0xFDE) 4) Bunch count offset 0xDE0 = 3552 (old value 0) Many data have been collected since May 26, 2008 together with other ATLAS detectors, so far, as I know, no report of event mismatching, which implies that trigger inhibit is properly done for MDT readout.

BCID Since EVID is just count of number of triggers in AMT, it is not sufficient to only use EVID to synchronize the event for different part of readout, where one of main purpose of BCID is to be used for event synchronization. Real time First bunch BCID reset BCID reset will be arrive MDT electronics at different time for different electronics, i.e., black arrow moves at real time (for sure will not be just before first LHC bunch!). BCID is a relative number, which has a fixed time interval respect to first bunch for an AMT chip assuming with fixed delays.

BCID = 1, First LHC Bunch MDT frontend electronics BCID is synchronized with MROD and MUON TTC system which should synchronized with ATLAS TTC system and with LHC TTC system, or simply say: MDT frontend BCID is same for with ATLAS/LHC TTC system. The mean of BCID = 1 is controlled by ATLAS/LHC TTC system. If one wants BCID 1 represents the first LHC bunch, the BCID should be received by ATLAS/LHC just before first LHC bunch assuming BCID reset gives BCID = 0.