1 The Instruction Set Architecture September 27 th, 2007 By: Corbin Johnson CS 146

2 What is the Instruction Set Architecture? It contains instructions to use and manipulate programmer-accessible hardware in a computer. It contains instructions to use and manipulate programmer-accessible hardware in a computer. in terms of in terms of place in a place in a computer computer

3 What is the relationship between the Instruction Set Architecture and Assembly / Machine language? An assembly / machine program is made up of the instructions in the ISA and makes use of registries in the ISA. An assembly / machine program is made up of the instructions in the ISA and makes use of registries in the ISA.

4 Here’s how it works Higher level languages (Java, C++, etc…) are translated into assembly / machine language by compilers. Higher level languages (Java, C++, etc…) are translated into assembly / machine language by compilers. When a user calls the program, the compiled program is loaded into RAM. When a user calls the program, the compiled program is loaded into RAM. The program then executes, line by line, until the Operating System takes back control of the computer. The program then executes, line by line, until the Operating System takes back control of the computer.

5 A Sample Computer: ARC The ARC has an ISA that is a subset of the ISA of the SPARC, or Scalable Processor Architecture processor developed by Sun in the mid 80’s. The ARC has an ISA that is a subset of the ISA of the SPARC, or Scalable Processor Architecture processor developed by Sun in the mid 80’s. Has most important features of SPARC but has left out most complex portions. Has most important features of SPARC but has left out most complex portions. ARC is considered a RISC or “Reduced Instruction Set Computer.” ARC is considered a RISC or “Reduced Instruction Set Computer.”

6 Goal: Program the ARC A program can be written for the ARC using the ISA of the ARC. A program can be written for the ARC using the ISA of the ARC. Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set

7 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set 32 bit memory 32 bit memory Byte Addressable Byte Addressable Memory-mapped I/O Memory-mapped I/O

8 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set The OS The OS 2 11 bits of memory 2 11 bits of memory Only OS uses this Only OS uses thisarea

9 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set The User Space The User Space Undefined amount Undefined amount User’s program fills User’s program fills Into unused space Designed to work well Designed to work well If stack small and Program large or Vice versa.

10 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set The System Stack The System Stack Undefined amount Undefined amount Program’s execution Program’s execution Uses stack for storage Grows towards lower Grows towards lower Memory as user’s Space grows towards Higher memory.

11 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set Memory-Mapped I/O Memory-Mapped I/O Static slots Static slots Data talks with input Data talks with input And output devices

12 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set The CPU The CPU Executes programs Executes programs In main memory Contains Registries Contains Registries Holding data Four-Step cycle to Four-Step cycle to Execute program

13 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set The Four Step The Four Step Cycle Cycle 1) Fetch next instruction 2) Decode the instruction 3) Read operand in main memory if any 4) Execute instruction and store results, if any.

14 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set The registers The registers Positions in CPU that hold data during calculation Positions in CPU that hold data during calculation Special Registries: %r0, %sp, %link, %psr, % pc Special Registries: %r0, %sp, %link, %psr, % pc

15 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set The Arithmetic and Logic Unit The Arithmetic and Logic Unit Takes care of calculations that need to be executed Takes care of calculations that need to be executed Fed instructions by the Control Unit Fed instructions by the Control Unit

16 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set Some Features of the ISA: Some Features of the ISA: All of the instructions in the Instruction Set are 32 bit All of the instructions in the Instruction Set are 32 bit ARC is load-store: all operands must be either loaded to use or stored in memory to be stored ARC is load-store: all operands must be either loaded to use or stored in memory to be stored ARC is two’s compliment ARC is two’s compliment

17 Discuss three main parts of ARC: Discuss three main parts of ARC: RAM RAM Processor (CPU) Processor (CPU) Instruction Set Instruction Set Three different classes of instructions: Three different classes of instructions: Arithmetic and Logic Arithmetic and Logic Memory Access Memory Access Transfer of Control Transfer of Control

18 Three different classes of instructions: Three different classes of instructions: Arithmetic and Logic Arithmetic and Logic Memory Access Memory Access Transfer of Control Transfer of Control Arithmetic and Logic Arithmetic and Logic Includes instructions like Add and Subtract Includes instructions like Add and Subtract Also includes instructions like AND, OR and NOT. Also includes instructions like AND, OR and NOT.

19 Three different classes of instructions: Three different classes of instructions: Arithmetic and Logic Arithmetic and Logic Memory Access Memory Access Transfer of Control Transfer of Control Memory Access Memory Access Includes instructions load and store Includes instructions load and store Loads into registers and stores into memory slots in RAM Loads into registers and stores into memory slots in RAM

20 Three different classes of instructions: Three different classes of instructions: Arithmetic and Logic Arithmetic and Logic Memory Access Memory Access Transfer of Control Transfer of Control Instructions help get to different places in program Instructions help get to different places in program Place in ISA where conditionals first are seen (if statement, loops, etc…) Place in ISA where conditionals first are seen (if statement, loops, etc…) Essentially changes program counter register Essentially changes program counter register

21 The Syntax of the ARC Assembly Language The Mnemonic is a way for the programmer to remember the instruction’s name. The Mnemonic is a way for the programmer to remember the instruction’s name. A Compiler will take a written assembly language code and convert it to machine code. A Compiler will take a written assembly language code and convert it to machine code.

22 What’s that cc after addcc? CC stands for Condition Code and they are set in the PSR (it is a 32 bit registry) CC stands for Condition Code and they are set in the PSR (it is a 32 bit registry) There are 4: There are 4: Z: if the result of the instruction is zero, this flag is set. Z: if the result of the instruction is zero, this flag is set. N: if the most significant bit is 1, this bit is set N: if the most significant bit is 1, this bit is set C: if there is a carry out of the MSB or a borrow into it, this flag is set. C: if there is a carry out of the MSB or a borrow into it, this flag is set. V: Overflow. The result cannot be represented in 32 bits. V: Overflow. The result cannot be represented in 32 bits.

23 THE PSR (Processor Status Register)

24 More on The Syntax of the ARC Assembly Language Brackets [ ] around an operand means to load (or store) from (or in) the memory which is addressed by the operand within the brackets. Brackets [ ] around an operand means to load (or store) from (or in) the memory which is addressed by the operand within the brackets.

25 A few of the 35 instructions The ARC ISA has more than 35 instructions. The ARC ISA has more than 35 instructions. Memory: ld [%r ], %r1 Memory: ld [%r ], %r1 Arithmetic: addcc %r1, 129, %r1 Arithmetic: addcc %r1, 129, %r1 Control: call sub_r Control: call sub_r

26 From Assembly Language to Machine Code Each Assembly Language instruction is translated one line for one line (one to one). Each Assembly Language instruction is translated one line for one line (one to one). rd: destination registry Cond: based on the PSR, this executes differently Simm13: a user defined constant in 2’s compliment in 13 bits. Rs1: registry 1 in the CPU Disp30/Disp 22: 30/22 bit number is shifted to the left to achieve 32 bit destination of it’s function.

27 Summary Although not explicitly shown, this method will take an upper level program and convert it into actual things the computer can do. Although not explicitly shown, this method will take an upper level program and convert it into actual things the computer can do. Involves translation from the higher level into assembly language into machine code using the ARC ISA. Involves translation from the higher level into assembly language into machine code using the ARC ISA.