1 Twin Binary Sequences: A Non-Redundant Representation for General Non-Slicing Floorplan Evan Young Department of Computer Science and Engineering The Chinese Univ. of Hong Kong Chris Chu Zion Shen Department of Electrical and Computer Engineering Iowa State University

2 Types of Floorplanning Structures Slicing FloorplanSlicing Floorplan Mosaic FloorplanMosaic Floorplan General FloorplanGeneral Floorplan Empty Room Slicing Mosaic General

3 Mosaic Floorplan Introduced by Hong et al. [ICCAD-00]Introduced by Hong et al. [ICCAD-00] Mosaic Floorplan Representations:Mosaic Floorplan Representations: –Corner Block List (CBL): Hong et al. [ICCAD-00] –Q-Sequence: Sakanushi & Kajitani [APCCAS- 00] Advantages:Advantages: –Much smaller solution space compared with general floorplan –Linear time floorplan realization Disadvantage:Disadvantage: –Some floorplans are excluded, e.g.,

4 Extending Mosaic to General Dissect into more than m (>= n) roomsDissect into more than m (>= n) rooms Include m-n empty roomsInclude m-n empty roomsHowever Don’t know where to assign the empty roomsDon’t know where to assign the empty rooms –Assigning randomly results in redundant rooms A large # of empty rooms needed to be insertedA large # of empty rooms needed to be inserted –In [ISPD-01], CBL is extended to cover the optimal floorplan by inserting n 2 –n empty rooms –Size of solution space is

5 Our Contributions Twin Binary Sequences (TBS)Twin Binary Sequences (TBS) –a new representation for mosaic floorplan We know exactly where to insert irreducible empty rooms for any given TBSWe know exactly where to insert irreducible empty rooms for any given TBS Every general floorplan can be obtained this wayEvery general floorplan can be obtained this way Every general floorplan can be obtained from a unique TBSEvery general floorplan can be obtained from a unique TBS Tight bound on the maximum # of empty rooms in a mosaic floorplanTight bound on the maximum # of empty rooms in a mosaic floorplan A linear time floorplan realization algorithmA linear time floorplan realization algorithm

6 Twin Binary Trees (TBT) Labeling=100101Labeling=011010

7 TBT as Mosaic FP Representation First suggested by Yao et al. [ISPD-01] to be used as a mosaic floorplan representationFirst suggested by Yao et al. [ISPD-01] to be used as a mosaic floorplan representation However,However, –not easy to maintain the twin binary property when we perturb the two trees –more complicated to be implemented in computer E D F B A C B AE CF D D A F EC B T1 T2

8 Inorder Traversal and Labeling Observation: Mosaic FP  A pair of binary trees with with same inorder traversals with same inorder traversals and complementary labelings and complementary labelings Inorder traversal: ABCDEF Labeling: E D F B A C B AE CF D D A F EC B T1 T2

9 Maintaining Twin Binary Property However, it is not sufficient to representHowever, it is not sufficient to represent a mosaic floorplan uniquely by: –inorder traversal of modules –labeling of T1 (= complemented labeling of T2) E D F B A C B AE CF D D A F EC B T1 T2 A D F E C B T1 B C D F E A ABCDEF ABCDEF ABCDEF 10010

10 Directional Bits Given an inorder traversal and a labeling,Given an inorder traversal and a labeling, a binary tree can be uniquely specified by adding directional bits Inorder traversal (  ): ABCDEF Labeling (  ): Directional bits (  ): D A F EC B Conditions on valid  : Let  =  1  2...  n-1,  =  1  2...  n. For the bit sequence  1  1  2...  n-1  n, (1) # of 0’s = # of 1’s + 1 (1) # of 0’s = # of 1’s + 1 (2) # of 0’s >= # of 1’s for any prefix (2) # of 0’s >= # of 1’s for any prefix

11 Twin Binary Sequences (TBS) Definition:Definition: A twin binary sequence is a 4-tuple (  ’) s.t.  = inorder traversal of T1 and T2  = labeling(T1) = labeling C (T2)  = directional bits of T1  ’ = directional bits of T2 Given a TBS, the mosaic floorplan can be constructed in O(n) time by a simple and efficient floorplan realization algorithmGiven a TBS, the mosaic floorplan can be constructed in O(n) time by a simple and efficient floorplan realization algorithm Theorem: There is a one-to-one mapping between twin binary sequences and mosaic floorplans.

12 Size of Solution Space One-to-one mapping between TBS and mosaic floorplanOne-to-one mapping between TBS and mosaic floorplan So # of different TBS is given by Baxter number (Yao et al. [ISPD-01])So # of different TBS is given by Baxter number (Yao et al. [ISPD-01]) Asymtotically, O(n! 2 3n / n 1.5 )Asymtotically, O(n! 2 3n / n 1.5 )  n! permutations of module names   ’ # of binary trees =  ( 2 2n / n 1.5 ) O(2 n ) combinations

13 Irreducible Empty Room An irreducible empty room is an empty room that cannot be removed by merging with another room in the floorplan.An irreducible empty room is an empty room that cannot be removed by merging with another room in the floorplan. Irreducible empty room (X) must occur inIrreducible empty room (X) must occur in reducible empty room irreducible empty room or XX A D B C D A C B wheel structure A,B,C & D are not X

14 Mapping Between Mosaic & General FP Mapping M x :Mapping M x : X X X X A D B C D A C B A B C D A BC D Theorem: Every general floorplan can be mapped by M x from one and only one mosaic floorplan.

15 Change in TBT when Inserting X Only two ways to insert X into a tree:Only two ways to insert X into a tree: X X A D B C D A C B A B C D A BC D C D A B T1T2 C B A D T1T2 C X A X DB C X A X T1T2 DB T1T2 A B A B A X A X BB

16 Insertion and Matching of X in TBT A B C DEF D T1 A C B E F B T2 AC F E D D X A X X C B E X X F T1’ X A X F X E X D X C B T2’ X0A0X0B1C1X1D0E0F1X1X X0A1B0C0X0X0D1E1F1X1X Inorder traversal + Labeling T1’: T2’:

17 Different Ways of Matching X A0B1C1X1D0E0F A1B0C0X0D1E1F T1”: T2”: D T1” A X C E F B B T2” AC F E D X A B C DE F X A B C D EF X D T1” A X C E F B B T2” AC F D X E Inorder traversal + Labeling Match 1 st X Match 2 nd X

18 X Insertion Algorithm An efficient algorithm designed:An efficient algorithm designed: –Without constructing any tree. Insert X to TBS directly. –Linear time Every general floorplan can be generated uniquely from one mosaic floorplan and one way of matching XEvery general floorplan can be generated uniquely from one mosaic floorplan and one way of matching X

19 Bounds on # of X Inserted Upper bound:Upper bound: Lower bound:Lower bound: X X X X X X X X X X X X X X X X

20 Experimental Setup PC with 1400 MHz Intel Xeon Processor and 256 Mb memoryPC with 1400 MHz Intel Xeon Processor and 256 Mb memory Simulated annealing to perturb TBSSimulated annealing to perturb TBS Best result out of 10 runs is reportedBest result out of 10 runs is reported

21 Experimental Results Area minimizationArea minimization MCNC MCNCbenchmark TBS (with X) TBS (no X) %DeadspaceRuntime (s) (s) % Deadspace % DeadspaceRuntime (s) (s) apte xerox hp ami33a ami49a playout

22 Experimental Results Area and wirelength minimizationArea and wirelength minimization MCNC bench mark TBS (with X) TBS (no X) %Deadspace Wire WirelengthCostRuntime (s) (s) %Deadspace Wire WirelengthCostRuntime (s) (s) apte xerox hp ami33a ami49a playout

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24 Floorplan Representations SlicingSlicing –Normalized Polish Expression: Wong & Liu [DAC- 86] MosaicMosaic –Corner Block List (CBL): Hong et al. [ICCAD-00] –Q-Sequence: Sakanushi & Kajitani [APCCAS-00] GeneralGeneral –Polar graphs: Ohtsuki et al. [ICCST-70] –Sequence pair: Murata et al. [ ICCAD-95] –Bounded Slicing Grid (BSG): Nakatake [ICCAD-96] –Transitive Closure Graph (TCG): Lin & Chang [DAC-01]