EE/CS 480/481 11/4/2016 6:36:58 PM University of Portland School of Engineering Project Gallon House Program Review 5 Team Evan McNichols Brian Myles Joe Oletti Advisors Prof. Nuxoll, Dr. Crenshaw, Dr. Osterberg Industry Representative Walt Harrison Intel, etc
EE/CS 480/481 2 University of Portland School of Engineering Overview Introduction Scorecard Additional Accomplishments Plans Issues/Concerns Conclusions 1/4/2016 6:36:58 PM
EE/CS 480/481 3 University of Portland School of Engineering Introduction 24 hour clock with bells and whistles –Time, Day, Class, Greeting, Ten-minute count down till next class 1/4/2016 6:36:58 PM
EE/CS 480/481 4 University of Portland School of Engineering Scorecard Acquired CPLD –Big relief Created logic to drive 10-min countdown LEDs Polished up PCB and displays boards even more 1/4/2016 6:36:58 PM
EE/CS 480/481 5 University of Portland School of Engineering Additional Accomplishments Acquired 1 Hz clock Mock-up of display boards 1/4/2016 6:36:58 PM
EE/CS 480/481 6 Display Boards Machine-information-systems.com, http:// 1/4/2016 University of Portland School of Engineering
EE/CS 480/481 7 PCB 1/4/2016 University of Portland School of Engineering
EE/CS 480/481 8 University of Portland School of Engineering Plans Program CPLD Order PCB (end of the month) Begin assembling component boards Have front face constructed 1/4/2016 6:36:58 PM
EE/CS 480/481 9 University of Portland School of Engineering Milestones NumberDescriptionOriginal 08 Oct 09 Previous 29 Jan 09 Present 27 Feb 09 16CPLD Testing Completed31 Jan 6 Mar 17Finalize PCB design31 Jan 28 Feb 17Receive MOSIS Chip15 Mar 18 Complete System Test with MOSIS 22 Mar 19Case Build Completed31 Mar 1/4/2016 6:36:58 PM
EE/CS 480/ University of Portland School of Engineering Concerns/Issues Testing with CPLD –Behind almost 1 month Group members and AFROTC Finalizing PCB 1/4/2016 6:36:58 PM
EE/CS 480/ University of Portland School of Engineering Conclusions Scorecard –99.9% finished with PCB Additional Accomplishments –Mock-up of display boards, 1 Hz clock Plans –CPLD burn and test run Issues/Concerns –AFROTC and PCB 1/4/2016 6:36:58 PM
EE/CS 480/ Questions Newsday.com, /4/2016 University of Portland School of Engineering