CASTNESS'07 Objectives 1 CASTNESS’07 1/3 - Objectives promote development of European reference platform for Numerical Embedded and Scalable Systems: Mastery of new European SW/HW architecture allowing European Companies/Universities/Research institutes to achieve world-leading positions in HW/SW solutions and products for numerical embedded scalable systems Creation of a validated reference design/architecture for embedded and numerical computation platforms Suites of interoperable design tools for rapid design and prototyping Theory and methods for holistic system design

CASTNESS'07 Objectives 2 CASTNESS’07 2/3 - Available Background l CASTNESS’07 facilitates the future exploitation of the know-how developed by:  SHAPES  AETHER, HARTES, MORPHEUS, SARC projects  ARTIST2 Network of Excellence  INFN development of 4 generations of APE Massive Parallel Processors  ATMEL Roma: mAgicV VLIW Gigaflops DSP IP Diopsis RISC+VLIW DSP Tile  ST Microelectronics: Spidergon Network-on-Chip  CASTNESS Research community

CASTNESS'07 Objectives 3 CASTNESS’07 3/3 Short/medium term opportunities … l Next (5 th ) generation of INFN systems  (future merge of APE + SHAPES + ??? Know-how) l Next (3 rd ) generation of ATMEL Diopsis MPSoC tile l Others… (CASTNESS’07 output!!!) l Call FP7-ICT-2007  Objective ICT Embedded Systems Design Theory and Methods for system design Suites of interoperable design tools for rapid design and prototyping Coordination of national, regional and EU-wide R&D programmes  Objective ICT Computing Systems A reference architecture for generic embedded platform Novel Tiled architecture for multi-core computing systems  Objective ICT Next-Generation Nanoelectronics Components and Electronics Integration l Future Emerging Technologies calls (to be presented today) …TO CREATE A COMMON EUROPEAN NUMERICAL EMBEDDED SCALABLE SYSTEM, physical and simulated systems, to be used by the CASTNESS research community