PMT HV Base Prototypes Evaluation Instrumentation Workshop LBNL July 23-24, 2003 Nobuyoshi Kitamura University of Wisconsin-Madison SSEC.

Slides:



Advertisements
Similar presentations
Understanding Electrical TransmissionDemonstration D1 A Guide to the National Grid Transmission Model Demonstration D1 Power losses in transmission.
Advertisements

Power e Lab PowerELab Limitedwww.powerelab.com 1 An Active EMI reduction IC WT6001 POWERELAB LIMITED A Power Converter Technology Provider.
The MAD chip: 4 channel preamplifier + discriminator.
Kay Graf Physics Institute 1 University of Erlangen ARENA 2006 University of Northumbria June 28 – 30, 2006 Integration of Acoustic Neutrino Detection.
Precision AC Current Measurement Technique Guildline Instruments Limited.
Large Area, High Speed Photo-detectors Readout Jean-Francois Genat + On behalf and with the help of Herve Grabas +, Samuel Meehan +, Eric Oberla +, Fukun.
Introduction What is an oscilloscope?.
MB4 New compared with MB3: Digital drivers / transformer drivers options 14 OPAMPS instead of 4 Thinner coaxial cables Shorter umbilical Heater coil integrated.
8/11/2006 FPIX TB meeting L. Perera 1 Pixel Power Supply Response Measurement Lalith Perera - Univ. of Iowa Carlos Florez, Simon Kwan, Charles Newsom,
Alternative Toroidal Transformer Designs and Measurements September 2, 2003 N. Kitamura University of Wisconsin-Madison / SSEC.
Status of LAV FEE electronics G. Corradi, C. Paglia, D. Tagnani & M. Raggi, T. Spadaro, P. Valente.
PROBE CARD INTEGRATION IN pALPIDEfs TEST SYSTEM ALICE | ITS-MFT Mini-Week | | Markus Keil.
ECAL status Outline: Signal cable connectors quality check results: –ADC side –PM side ECAL PM/C-W channels commissioning status Access activities Further.
PMT Modular HV Supply Design Status December 2003 Madison Instrumentation Workshop Nobuyoshi Kitamura UW-Madison.
TF Joint Voltage Drop Instrumentation Robert Marsala (609) Hans Schneider (609) Engineering Operations August 7, 2003 TF_JOINT_Final_Design_Review.ppt.
Preliminary Design Review May 20, 2003 PMT HV Base Board Engineering Requirements Nobuyoshi Kitamura SSEC / UW-Madison.
Performance of SPIROC chips in SKIROC mode
Fast high-voltage, high-current switching using stacked IGBTs
Instrumental Analysis Electrical Components and Circuits.
Noise studies: hardware tests and preliminary results Anna, Anton, Giovanni, Pigi, Silvia, A. Boiano, A. Vanzanella.
LHC ARC Commissioning report during LS1 Agenda: VRGPE documentation (former VRJGE) Active Penning modification By-Pass Valves modification LHC ARC commissioning.
1 PMT Base Prototypes Comparison using DOMMB ATWD August 6, 2003 Nobuyoshi Kitamura UW-Madison / SSEC.
Laguna Beach, CA March 30-April 1, 2003 PMT HV Base Board Development Nobuyoshi Kitamura SSEC / UW-Madison.
CAEN November 15, 2002 Vandelli W. 1 Test Conditions Prototype fed by CAEN Module 2527 through 100 m long cables From channels status page on generator.
1 2 nd Virgo+ review, Cascina 17/10/2007 H. Heitmann New Quadrant Diodes New Quadrant Diodes Motivations & Requirements Status & Plans: see Nikhef talk.
PMF: front end board for the ATLAS Luminometer ALFA TWEPP 2008 – 19 th September 2008 Parallel Session B6 – Programmable logic, boards, crates and systems.
LHCb F. Murtas Servizio elettronica G. Corradi D.Tagnani P.Ciambrone HV_GEM per LHCB M1R1 HV power supply Introduction Introduction HV_GEM Technical specification.
Anatoli Konoplyannikov Design and integration of HV, LED monitoring and calibration system for HCAL Overview of the subsystems design High voltage.
Digital Signal Processing and Generation for a DC Current Transformer for Particle Accelerators Silvia Zorzetti.
String-18 New-DAQ Commissioning Azriel Goldschmidt AMANDA Collaboration Meeting Berkeley, March 2002.
Photos of Rig. The FRB Stack The FRBs The SiPMs The PotentiometersDry Air Tube Cooling Pad Fixel Trigger Board FRB to BBB Ribbon Cables.
UW Engineering DOM Studies Kael Hanson University of Wisconsin – Madison LBNL DOM Workshop 23 July 2003.
UF –PNPI HV system status August 2008 Sergey Volkov Nikolai Bondar PNPI.
CARDIAC meeting – 30 Sept 05 M3R3-M5R3-M5R4 FEE status.
L0 Technical Readiness Review-Electronics Installation Linda Bagby L0 Electronics Installation  System Electronics Overview u Low Voltage s Filter.
Towards a final design of LAV front-end M. Raggi, T. Spadaro, P. Valente & G. Corradi, C. Paglia, D. Tagnani.
1394b Gigabit Ethernet The transmitter Group (G8) Design Proposal Mubin Ansari Zubair P. Siddiqui February 14, 2002.
Director’s Review of RunIIb Dzero Upgrade Installation Linda Bagby L0 Electronics Installation  System Electronics Overview u Low Voltage u High.
Lecture 5: DMM & Oscilloscope 1. DMM can be used to measure: DC & AC voltages – current - resistance - BJT (β test) - diode test - short circuit test,
Pixel power R&D in Spain F. Arteche Phase II days Phase 2 pixel electronics meeting CERN - May 2015.
The labjack. WHAT IS A LABJACK? An interface box that allows a computer to interact with the real world by collecting data and passing out instructions.
2007 detectors study at CERN 1.SiPM time resolution 2.MAPD S60 3.Blue sensitive MAPD 4.New 16ch board 5.New HV.
A Cockcroft-Walton HV-Generator / PMT-Base for NPS Joshua Frechem Charles Hyde Old Dominion University 21 Jan 2016.
SPD VFE installation and commissioning (status and plans) I.Summary of VFE installation II.Stand alone VFE test: noise & offset III.Stand alone test: LED.
Electronics for CEDAR Cristina Lazzeroni, Marian Krivda, Richard Staley, Xen Serghi, Karim Massri University of Birmingham, UK 3/5/
Gigabit Ethernet: An Affordable Solution Preliminary Design G4 Gaurav Asthana James Denaro.
HCAL1 Status 2004 Oleg Gavrishchuk, JINR, Dubna 1. HCAL1 performance in 2004 General design High Voltage system LED monitoring 2. Stability in 2003 Led.
EKT 314/4 WEEK 5 : CHAPTER 3 SIGNAL CONDITIONING ELECTRONIC INSTRUMENTATION.
Sumary of the LKr WG R. Fantechi 31/8/2012. SLM readout restart First goal – Test the same configuration as in 2010 (rack TS) – All old power supplies.
G.F. Tassielli - SuperB Workshop XI LNF1/11 02/12/2009 Status report on CLUster COUnting activities G. F. Tassielli on behalf of CLUCOU group SuperB Workshop.
Jitter and BER measurements on the CuOF prototype G. Dellacasa, G. Mazza – INFN Torino CMS Muom Barrel Workshop CERN, February 25th, 2011.
DOM Electronics (Digital Optical Module) 1 WPFLElectronics PPMDOM ElectronicsF. Louis.
Specifications Asic description Constraints Interface with PDM board Planning Summary.
Front End. Charge pre-amp and detector Voltage regulator. TOP side. Detector linear voltage regulator BOTTOM side. Charge pre-amp.
LHCb Outer Tracker Electronics 40MHz Upgrade
PMF STATUS ALFA - Electronics meeting 11th February 2008
(5) DMM & Oscilloscope.
Calorimeter Mu2e Development electronics Front-end Review
ECAL Front-end development
Development electronics SIPM-MU2e
BCTW calibration status and future
High-Voltage Supply Requirements Review
University of Wisconsin-Madison / SSEC
CRITICAL design review: Nixie tube clock
Testing of the EMCO Prototype Boards
Subject Name: Microwave and Radar Subject Code: 10EC54
Seyoung Han / Ewha Woman’s Univeristy
Lecture No# 4 Prepared by: Engr. Qurban Ali Memon
RS-422 Interface.
Characterization of Wired-OR prototype board
Presentation transcript:

PMT HV Base Prototypes Evaluation Instrumentation Workshop LBNL July 23-24, 2003 Nobuyoshi Kitamura University of Wisconsin-Madison SSEC

Three prototypes “Old Iseg”—Aug prototypes “New Iseg”—Split ground implemented. “EMCO”—Passive base approach consisting of three components: Passive base, HV generator, & digital interface. N. Kitamura 7/23/2003 Jumper pads Ribbon connector Digital interface board HV generator Passive base All designs present the same interface to DOMMB.

New Iseg--Isolated Ground Data by John Kelly (hv_2000_iseg_psl.pdf) Output voltage is unstable with no ground-connecting jumper N. Kitamura 7/23/2003

Data by John Kelly (hv_3000_iseg_049.pdf) New Iseg with a 1M  Jumper The output voltage is stabilized by installing a jumper. N. Kitamura 7/23/2003

Connecting Grounds with a Zero  Jumper N. Kitamura 7/23/2003

Connecting Grounds with a 1M  Resister N. Kitamura 7/23/2003

Noise Introduced by Digital Communication This example shows noise from reading the ADC on a new Iseg base with a 1M  jumper. N. Kitamura 7/23/2003

ISEG OLDISEG NEWEMCO NOISE AT OUTPUT* mVpp1.22 ± ± ± 0.21  Vrms 214 ± ± ± 31 *At 50  oscilloscope input using a 50  cable. 100 nsec window (400 pts.) The scope background is 1mVpp, 190  Vrms over 100 nsec. Noise Comparison All the bases have similar random noise levels observed at the secondary side of the signal coupling transformer. N. Kitamura 7/23/2003

POWER CURRENT (+5V) CURRENT (-5V) Power Dissipation    “  ” disableHV N. Kitamura 7/23/2003

Transient Power ISEG OLD ISEG NEW EMCO 0.5V, 50nsec Enable after setting DAC to Measure across 1  Trigger on “enableHV” N. Kitamura 7/23/2003 ?

Overall Comparison of the Three Prototypes ISEG OLDISEG NEWEMCO NOISE AT OUTPUT* mVpp1.22 ± ± ± 0.21  Vrms 214 ± ± ± 31 1 ST DYNODE VOLTAGEFIXED (600V)SCALE WITH OUTPUT POWER AT MAX OUTPUT (mW) COST (US$)~150~260~600 *At 50  oscilloscope input using a 50  cable. 100 nsec window (400 pts.) The scope background is 1mVpp, 190  Vrms over 100 nsec. N. Kitamura 7/23/2003

Conclusion N. Kitamura 7/23/2003 Old Iseg or New Iseg? New Iseg with isolated grounds performs badly New Iseg with directly connected grounds performs badly New Iseg with 1M  jumper performs very similarly to Old Iseg Old Iseg is cheaper than New Iseg Old Iseg consumes less power then New Iseg  Old Iseg Iseg or EMCO? Both have similar noise levels Vdy1 is fixed in Iseg approach Iseg is cheaper than EMCO  Iseg