Automatic Evaluation of the Accuracy of Fixed-point Algorithms Daniel MENARD 1, Olivier SENTIEYS 1,2 1 LASTI, University of Rennes 1 Lannion, FRANCE 2 IRISA/INRIA Rennes, FRANCE

2 D. Menard, O. Sentieys University of Rennes 1 Outline of the presentation Motivations Theoretical concepts Accuracy evaluation methodology Overview of the tool Description of the different steps Results Conclusion

3 D. Menard, O. Sentieys University of Rennes 1 Motivations Embedded Digital Signal Processing (DSP) systems Specification with floating-point data types Implementation in fixed-point architectures  Development of new methodologies for the automatic transformation of floating-point descriptions into fixed-point specifications #define pi main() { float x,h,z for(i=1;i<n;i++) { *z= *y++ + *h++ } for(i=1;i<n;i++) { *z= *y++ + *h++ } VIRGULE FLOTTANTE.C Fixed-point coding Precision evaluation #define pi main() { float x,h,z for(i=1;i<n;i++) { *z= *y++ + *h++ } for(i=1;i<n;i++) { *z= *y++ + *h++ } VIRGULE FLOTTANTE.C Floating-point description Fixed-point description Optimization

4 D. Menard, O. Sentieys University of Rennes 1 Motivations Accuracy evaluation metric : Signal to Quantization Noise Ratio (SQNR) : Methodologies for the SQNR evaluation are based on simulation [Coster98], [Keding01], [Kim98] Drawbacks : – Long simulation time [Coster98] – Fixed-point format optimization process requires multiple simulations [Sung95] Presentation of a new methodology based on an analytical approach

5 D. Menard, O. Sentieys University of Rennes 1 Theoretical concepts Linear time-invariant systems : The output quantization noise b y (n) is the sum of filtered noise sources b’(n) [Menard02] + Input signal Noise sources (generated during a cast operation) Output noise Output signal Input noise Error due to coefficient quantization

6 D. Menard, O. Sentieys University of Rennes 1 SQNR Computation Tool Front End Back End Intermediate representation Analytical method Analytical method SQNR GsGs Signal flow graph (SFG) + fixed-point specifications Back-end stages :  T 1 : Quantization noise modelisation  T 2 : Transfer function determination  T 3 : SQNR computation Front-end stages :  CDFG generation (SUIF)  CDFG to DFG transformation  DFG to SFG transformation Source algorithm C CDFG generation SFG generation SUIF

7 D. Menard, O. Sentieys University of Rennes 1 Transformation T 1 : G s  G sn Goal : specify the system with a Signal Flow Graph G sn at the quantization noise level Steps : – Detection and insertion of the noise sources – Introduction of the operator noise models  zSzS  uSuS uNuN vSvS vNvN zNzN +  Multiplication noise model  u v z T1T1 Noise node Signal node Signal node Noise node

8 D. Menard, O. Sentieys University of Rennes 1 Transformation T 2 : G sn  G H (1) Stage T 21 : G sn  G k Goal : transform the Signal Flow Graph G sn into several directed acyclic graphs (DAG) Steps : – Detection of the cycles : linear complexity algorithm – Enumeration of the cycles : polynomial complexity – Dismantle of the cycles in order to obtain DAG Stage T 22 : G k  G eq Goal : specify the system with a set of linear functions Step : depth-first traversal of the graph with a post-order recursive algorithm

9 D. Menard, O. Sentieys University of Rennes 1 Transformation T 2 : G sn  G H (2) Stage T 23 : G eq  G H i Goal : specify the system with a set of partial transfer functions Steps : – Application of a set of variable substitutions –  transformation of the linear functions Stage T 24 : G H i  G H Goal : specify the system with a set of global transfer functions Step : Computation of the global transfer functions from the partial transfer functions

10 D. Menard, O. Sentieys University of Rennes 1 Results Test of the tool on classical DSP algorithms : FIR and IIR filters, FFT Precision of the estimation : Measurement of the relative error between our estimation and the one obtained by simulation – IIR 2 < 8.2 % – FIR 16 < 1.5 % – FFT 16 < 2.3 % Execution time : Most of the time is consumed by the stage T2 – FIR 256 : 0.86 s – IIR 4 : 0.65 s

11 D. Menard, O. Sentieys University of Rennes 1 Conclusion Definition of a new methodology for computing the SQNR based on an analytical approach Development of a tool for implementing this methodology Limitation : the method can not cope with recursive non-linear systems Advantages : Smaller optimization time for the process of fixed- point data format optimization – Hardware synthesis : minimization of the chip area under SQNR constraint

12 D. Menard, O. Sentieys University of Rennes 1 References [Coster98] L. D. Coster, M. Ade, R. Lauwereins, and J. Peperstraete. Code Generation for Compiled Bit-True Simulation of DSP Applications. In Proceedings of ISSS’98, Taiwan, December [Johnson75] D. B. Johnson. Finding All the Elementary Circuits of a Directed Graph. SIAM Journal on Computing, 4(1):77–84, March [Keding01] H. Keding, M. Coors, O. Luthje and H. Meyr. FRIDGE: Fast Bit True simulation. In Design Automation Conference 2001 (DAC 01), June 2001, Las Vegas. [Kim98] S. Kim, K. Kum, and S. Wonyong. Fixed-Point Optimization Utility for C and C++ Based Digital Signal Processing Programs. IEEE Transactions on Circuits and Systems–II: Analog and Digital Signal Processing, 45(11), November [Menard02] D. Menard and O. Sentieys. A methodology for evaluating the precision of fixed-point systems. ICASSP 2002, May 2002, Orlando [Sung95] W. Sung and K. Kum. Simulation-Based Word-Length Optimization Method for Fixed-Point Digital Signal Processing Systems. IEEE Transactions on Signal Processing, 43(12), December 1995.