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 Embedded Digital Signal Processing (DSP) systems  Specification with floating-point data types  Implementation in fixed-point architectures  Precision.

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Presentation on theme: " Embedded Digital Signal Processing (DSP) systems  Specification with floating-point data types  Implementation in fixed-point architectures  Precision."— Presentation transcript:

1  Embedded Digital Signal Processing (DSP) systems  Specification with floating-point data types  Implementation in fixed-point architectures  Precision evaluation based on simulation [Coster98], [Keding01], [Kim98]  Long simulation time [Coster98]  Optimization process requires multiple simulations [Sung95]  Definition of a new methodology based on an analytical approach  Embedded Digital Signal Processing (DSP) systems  Specification with floating-point data types  Implementation in fixed-point architectures  Precision evaluation based on simulation [Coster98], [Keding01], [Kim98]  Long simulation time [Coster98]  Optimization process requires multiple simulations [Sung95]  Definition of a new methodology based on an analytical approach Signal Noise sources (generated during a cast operation) Output noise Output signal Input noises Error due to coefficient quantization + System Inputs A METHODOLOGY FOR EVALUATING THE PRECISION OF FIXED-POINT SYSTEMS Daniel MENARD 1, Olivier SENTIEYS 1,2 1 LASTI - University of Rennes I F-22300 Lannion, France Daniel.Menard@enssat.fr 2 COSI Project - IRISA/INRIA F-35042 Rennes cedex, France Olivier.Sentieys@enssat.fr. Linear Time-Invariant System Model SQNR GsGs DFG Generation SFG Generation SUIF SQNR Determination G sn GHGH Back End Source C algorithm Experimentation, Results and Perspectives SQNR Computation Methodology Output quantization noise Noise due to coefficient quantization Quantization noise #define pi 3.1416 main() { float x,h,z for(i=1;i<n;i++) { *z= *y++ + *h++ } for(i=1;i<n;i++) { *z= *y++ + *h++ } VIRGULE FLOTTANTE.C Fixed-point coding Precision evaluation #define pi 3.1416 main() { float x,h,z for(i=1;i<n;i++) { *z= *y++ + *h++ } for(i=1;i<n;i++) { *z= *y++ + *h++ } VIRGULE FLOTTANTE.C Floating-point description Fixed-point specification Optimization Introduction  Propagation noise models:  Addition: z = u + v  Multiplication: z = u  v  Quantization noise model:  b gi (n) : additive random variable  Stationary and uniformly distributed white noise  Uncorrelated with y(n)  First and second-order moments:  Propagation noise models:  Addition: z = u + v  Multiplication: z = u  v  Quantization noise model:  b gi (n) : additive random variable  Stationary and uniformly distributed white noise  Uncorrelated with y(n)  First and second-order moments: Noise models + Q Front End System noise model determination H(z) Determination  SFG to DAG transformation  Detection of cycles in the SFG  Enumeration of the cycles  Dismantling of the cycles  DAG linear function computation  Partial T.F. determination  Global T.F. determination  SFG to DAG transformation  Detection of cycles in the SFG  Enumeration of the cycles  Dismantling of the cycles  DAG linear function computation  Partial T.F. determination  Global T.F. determination Noise modelization Signal Flow Graph + fixed-point specifications Transfer Function (T.F.) determination  Noise source detection and insertion in the SFG  Replacement of operators by their propagation noise model  Test of the tool on classical DSP algorithms:  FFT, FIR and IIR filters  Precision of the estimation:  Measurement of the relative error between our estimation and the one obtained by simulation  IIR 2 < 8.2 %  FIR 16 < 1.5 %  FFT 16 < 2.3 %  Execution time of the tool:  Perspectives:  Hardware synthesis: minimization of the chip area under SQNR constraint:  Most of the time is consumed by the cycle enumeration stage Abstract : The minimization of cost, power consumption and time to market of DSP applications requires the development of methodologies for the automatic implementation of floating-point algorithms in fixed-point architectures. In this paper, a new methodology for evaluating the quality of an implementation through the automatic determination of the Signal to Quantization Noise Ratio (SQNR) is under consideration. The modelization of the system at the quantization noise level and the expression of the output noise power have been detailed for linear systems. Then, the different phases of the methodology are explained and the ability of our approach for computing the SQNR efficiently is shown. +


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