Lecture notes Reading: Section 3.4, 3.5, 3.6 Multiplication

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Presentation transcript:

Lecture 12-13 notes Reading: Section 3.4, 3.5, 3.6 Multiplication Unsigned multiplication Hardware implementation Division Floating point

Unisigned shift-add multiplier (version 1) 64-bit Multiplicand reg, 64-bit ALU, 64-bit Product reg, 32-bit multiplier reg Shift Left Multiplicand 64 bits Multiplier Shift Right 64-bit ALU 32 bits Write Product Control 64 bits Multiplier = datapath + control

MULTIPLY HARDWARE Version 2 32-bit Multiplicand reg, 32 -bit ALU, 64-bit Product reg, 32-bit Multiplier reg Multiplicand 32 bits Multiplier Shift Right 32-bit ALU 32 bits Shift Right Product Control 64 bits Write

What’s going on? Multiplicand stay’s still and product moves right A0 A0 A1 A2 A3 B0 A0 A1 A2 A3 B1 A0 A1 A2 A3 B2 A0 A1 A2 A3 B3 P7 P6 P5 P4 P3 P2 P1 P0 Multiplicand stay’s still and product moves right

Multiplier is Negative Convert to positive->mult->sign conversion Sign extended algorithm: 1 0 0 1 1 (-13) x 0 1 0 1 1 (11) 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 0 0 1 1 0 0 0 0 0 0 0 0 1 1 1 0 0 1 1 0 0 0 0 0 0 0 1 1 0 1 1 1 0 0 0 1 (-143)

Fast Hardware Use multiple hardware ALUs Parallel binary addition Binary tree type structured Parallel binary addition

Long Divide: Paper & Pencil 1001 Quotient Divisor 1000 1001010 Dividend –1000 10 101 1010 –1000 10 Remainder Dividend = Quotient x Divisor + Remainder

DIVIDE HARDWARE Version 1 64-bit Divisor reg, 64-bit ALU, 64-bit Remainder reg, 32-bit Quotient reg Shift Right Divisor 64 bits Quotient Shift Left 64-bit ALU 32 bits Write Remainder Control 64 bits

Initialization: Set 32-bit Quotient reg to 0 Place the divisor in the high half of the 64-bit divisor reg Remainder reg initialized with dividend

Binary representation of fraction (1001.1001)2 = 1 x 2 3 + 0 x 2 2 + 0 x 2 1 +1 x 2 0 + 1 x 2-1 + 0 x 2-2 + 0 x 2-3 +1 x 2-4 = (9.5625)10 (0.625) 10 = (0.5 + 0.125) 10 = 1 x 2-1 + 0 x 2-2 + 1 x 2-3 = (0.101) 2 2-1 2-2 2-3 2-4 2-5 2-6 0.5 0.25 0.125 0.0625 0.03125 0.0150625

Scientific Notation Issues: Arithmetic (+, -, *, / ) exponent decimal point Sign, magnitude 23 -24 6.02 x 10 1.673 x 10 radix (base) Mantissa Sign, magnitude Issues: Arithmetic (+, -, *, / ) Representation, Normal form Range and Precision Rounding Exceptions (e.g., divide by zero, overflow, underflow)

IEEE 754 Floating-Point 1 8 23 single precision S E F exponent: excess 127 binary integer fraction: sign + magnitude, normalized binary significand w/ hidden integer bit: 1.F actual exponent is e = E - 127 0 < E < 255 S E-127 N = (-1) 2 (1.F) 0 = 0 00000000 0 . . . 0 -1.5 = 1 01111111 10 . . . 0 Magnitude of numbers that can be represented is in the range: -126 127 23 2 (1.0) to 2 (2 - 2 ) which is approximately: -38 38 1.8 x 10 to 3.40 x 10 (integer comparison valid on IEEE Fl.Pt. numbers of same sign!)

Example: -0.75 in float point -0.75=-(0.5+0.25)= -(0.11)2 In scientific notation, the value is -0.112 x 20 normalized scientific notation: -1.12 x 2-1 In single precision: (-1) S x (1 + fraction) x 2 (exponent-127) S = 1 fraction = 10000000000000000000000 Exponent = 126 = 01111110 1 01111110 10000000000000000000000

Floating Point Addition Algorithm Add x=0.5 and y=– 0.4375 in binary (2) x= 1.000 x 2-1, y= -1.110 x 2-2. right shift the smaller exponent (y) so that both have same exponent value y= -0.111 x 2-1 (3) Add the fraction parts: 1.000 x 2-1 + -0.111 x 2-1 = 0.001 x 2-1 (4) left shift result to normalize 0.001 x 2-1=1.000 x 2-4 (5) Round (not needed in this example)