Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, 2002 1 EVLA Monitor and Control Module Interface Board (MIB) Design.

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Presentation transcript:

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, EVLA Monitor and Control Module Interface Board (MIB) Design

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, MIB Block Diagram

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Embedded Controller Infineon TRICore TC11IB  System On a CHIP  12 MHZ External Clock  1.5 MBytes RAM  Hardware/Software Resets  Watchdog Timer  Sleep Modes  Seven Thirty-Two Bit Timers

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Embedded Controller Infineon TC11IB – Interfaces  Media Independent Interface (MII)  PCI Bus – Version  MultiMediaCard Interface  Two Asynchronous Serial Ports  One Synchronous Serial Port (SPI)  Standard External Bus Interface

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Ethernet Interface Ethernet Interface – 100 MBit/second  Translation Chip – Intel LXT971A  Fiber Optic Transceiver – Infineon V23809-C8-C10

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Flash Memory Flash Memory – Checksum  Code Storage  MIB – Boots Main Operation Code  Device – Device Specific Code  Parameter Storage  MIB – Loads Slot ID and Parameters  Device – Device Parameters  All Code Documented

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Data Storage Memory Data RAM – Inside TC11IB  Code Storage  Parameter Storage  Communication Data Storage

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Reset Logic  Power Supervisor – Maxim MAX706  Watchdog Protection – TC11IB  Devices Must Reset into Safe Condition

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Timing Logic  19.2 Hz Timing Signal (Transition)  1 PPS Timing Signal  10 Second Timing Signal  10 ms Timing Signal  Devices May Require Precise Timing  Hardware Timing

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Parallel Interface  Thirty-Two Bits Transfer  PCI Bus  External Bus

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Serial Interfaces  Asynchronous Ports  One Two Wire Port  One Modem Port  Synchronous Ports  SPI Port – UP to Sixteen Bits  How are Select Lines Provided?

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Address Logic  Memory Mapped Functions  Devices  Multiplexed Address/Data Bus  Separate Address/Data Bus

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, Control Logic  Peripheral Interfaces  Motorola or Intel or Both  NRAO Generated Interface  VLBA Model  Dual Port RAM Model

Author Wayne M. Koski EVLA Monitor & Control Hardware PDR March 13, A/D or D/A Logic  A/D Logic  Device  D/A Logic  Device