Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s.
Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s
Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. Negative numbers have implied 1’s to the left because it’s the complement of a positive number’s 0’s. So, put 16 bit number in right most 16 bits and fill with 1’s.
Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. Negative numbers have implied 1’s to the left because it’s the complement of a positive number’s 0’s. So, put 16 bit number in right most 16 bits and fill with 1’s
Conversion to Larger Number of Bits Ex: Immediate Field (signed 16 bit) to 32 bit Positive numbers have implied 0’s to the left. So, put 16 bit number in right most 16 bits and fill with 0’s. Negative numbers have implied 1’s to the left because it’s the complement of a positive number’s 0’s. So, put 16 bit number in right most 16 bits and fill with 1’s. Or, put 16 bits in the right most 16 bits and fill with the sign bit. This is called sign extension.
Division – Positive numbers Divisor Dividend Quotient
Division – Positive numbers Divisor Dividend or Remainder < 0 Change Quotient bit to 0 and restore This must be true or the quotient would exceed 4 bits, so start with shift Trial 1 Quotient
Division – Positive numbers Divisor Dividend or Remainder < 0 Change Quotient bit to 0 and restore, then shift and try again Trial 1 Quotient
Division – Positive numbers Divisor Dividend or Remainder < 0 Change Quotient bit to 0 and restore, then shift and try again Trial 01 Quotient
Division – Positive numbers Divisor Dividend or Remainder > 0 shift and use new remainder Trial 001 Quotient
Division – Positive numbers Divisor Dividend or Remainder New Remainder Trial 001 Quotient
Division – Positive numbers Divisor Dividend or Remainder Remainder Trial 0011 Quotient
4 bit ALU Control Test Divisor Remainder Shift R / L Initialize with Dividend 0111 Same basic hardware as Multiply
4 bit ALU Control Test Divisor Remainder Shift R / L 1. Shift Remainder left Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Shift Remainder left 2.Subtract the Divisor 2’s complement 1110 Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Shift Remainder left 2.Subtract the Divisor 3.< 0, add Divisor 1110 Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Shift Remainder left 2.Subtract the Divisor 3.< 0, add Divisor 4.Shift left, Set Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 1110 Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 2. < 0, add Divisor 1110 Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 2. < 0, add Divisor 3.Shift, Set Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 1110 Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 2.>0, shift left, set Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 1110 Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 2.>0, Shift left, set Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract the Divisor 2.>0, Shift left, set 1 3.Shift left half right 1110 Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L Quotient = 0011 Remainder = Dividend
Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor
Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor (r – d + d)*2 – d = (r – d)*2 + 2d – d = ( r – d)*2 + d
Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor (r – d + d)*2 – d = (r – d)*2 + 2d – d = ( r – d)*2 + d If r – d < 0, Qi = 0, shift r-d and add Divisor
Non-Restoring Division r = Remainder d = Divisor r – d < 0, Qi = 0,restore, shift and subtract Divisor (r – d + d)*2 – d = (r – d)*2 + 2d – d = ( r – d)*2 + d If r – d < 0, Qi = 0, shift r-d and add Divisor Algorithm for Non- restoring Division 1.Subtract Divisor from Remainder 2.If r-d > = 0, Qi = 1, shift and subtract divisor 3.If r-d < 0, Qi =0, shift and add divisor 4. After n bits, if Remainder is negative, restore
Non –Restoring Division 1.Shift Remainder Register left 1 bit 2.Subtract the Divisor Register from the left half of the Remainder Register Test Remainder >= 0 < 0 3a. Shift Remainder left and set bit 0 to 1 3b. Shift Remainder left and set bit 0 to 0 n Repetitions ? Yes No Yes n Repetitions ? No 4a. Subtract Divisor from left half of Remainder Register 4b. Add Divisor to left half of Remainder Register 5a. Shift left half of Reminder right one bit 5b. Shift left half of Remainder right one bit and add Divisor to left half of Remainder
4 bit ALU Control Test Divisor Remainder Shift R / L Initialize with Dividend 0111 Non –Restoring Division
4 bit ALU Control Test Divisor Remainder Shift R / L 1. Shift Remainder left Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Shift Remainder left 2.Subtract the Divisor 2’s complement 1110 Dividend
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Shift Remainder left 2.Subtract the Divisor 3.< 0, Shift left, Set Dividend ’s complement
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Add divisor 1110 Dividend ’s Complement
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Add divisor 1110 Dividend ’s Complement
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Add divisor 2.< 0, Shift left, set Dividend ’s Complement
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Add divisor 1110 Dividend ’s Complement
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Add divisor 2.> 0, Shift left, set Dividend ’s Complement
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract divisor 1110 Dividend ’s Complement
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract divisor 2.>0, Shift left, set Dividend ’s Complement
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract divisor 2.>0, Shift left, set 1 3.Shift Left Half right 1110 Dividend ’s Complement
4 bit ALU Control Test Divisor Remainder Shift R / L 1.Subtract divisor 2.>0, Shift left, set 1 3.Shift Left Half right 1110 Dividend ’s Complement
MIPS Instructions for Multiply and Divide Hi,Lo are two 32 bit registers for Product and Remainder divide div$s1, $s2# Lo = $s1/$s2 = quotient # Hi = $s1 mod$s2 = remainder For signed numbers, 1. determine the sign of the quotient 2. convert to positive representation 3. divide 4. determine the sign and convert to 2’s complement if needed
MIPS Instructions for Multiply and Divide Hi,Lo are two 32 bit registers for Product and Remainder divide div$s1, $s2# Lo = $s1/$s2 = quotient # Hi = $s1 mod$s2 = remainder divide unsigned divu$s1, $s2 # unsigned version of div
MIPS Instructions for Multiply and Divide Hi,Lo are two 32 bit registers for Product and Remainder multiply mult$s1, $s2# Hi,Lo = $s1 x $s2 multiply unsigned multu$s1, $s2# Hi,Lo = $s1 x $s2 ( unsigned) move from Hi mfhi$s3# $s3 = Hi move from Lo mflo$s3# $s3 = Lo
Short Cuts for Multiply and Divide For Positive Numbers 1. Multiply by 2 k is the same as shift k to the left, 0 fill 2. Divide by 2 k is the same as shift k to the right, 0 fill
Short Cuts for Multiply and Divide For Positive Numbers 1. Multiply by 2 k is the same as shift k to the left, 0 fill 2. Divide by 2 k is the same as shift k to the right, 0 fill For 2’s Complement Numbers It does not always work!
Short Cuts for Multiply and Divide For Positive Numbers 1. Multiply by 2 k is the same as shift k to the left, 0 fill 2. Divide by 2 k is the same as shift k to the right, 0 fill For 2’s Complement Numbers It does not always work! Ex: -5 = -0101, 2’s Complement = 1011 Divide by 4 by shift right 2, fill with ?
Short Cuts for Multiply and Divide For Positive Numbers 1. Multiply by 2 k is the same as shift k to the left, 0 fill 2. Divide by 2 k is the same as shift k to the right, 0 fill For 2’s Complement Numbers It does not always work! Ex: -5 = -0101, 2’s Complement = 1011 Divide by 4 by shift right 2, fill with ? 1110 is =0010 = 2 WRONG!
Floating Point Numbers Normalized Mantissa or Significand and Exponent Add x and x 10 -1
Floating Point Numbers Normalized Mantissa or Significand and Exponent Add x and x Align the exponents by shifting the smaller x x 10 -1
Floating Point Numbers Normalized Mantissa or Significand and Exponent Add x and x Align the exponents by shifting the smaller x x Add x 10 -1
Floating Point Numbers Add x and x Align the exponents by shifting the smaller x x Add x Normalize x 10 0
Floating Point Numbers Add x and x Align the exponents by shifting the smaller x x Add x Normalize x Round off x 10 0
Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee
Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee Leading 1 Binary Point Significand = 1.yyyyyyyyy Exponent(signed) Arithmetic
Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee Leading 1 Binary Point Significand = 1.yyyyyyyyy Exponent(signed) Arithmetic
Floating Point Numbers Add x 2 3 and x 2 1
Floating Point Numbers Add x 2 3 and x Align the exponents by shifting the smaller x x 2 3
Floating Point Numbers Add x 2 3 and x Align the exponents by shifting the smaller x x Add x 2 3
Floating Point Numbers Add x 2 3 and x Align the exponents by shifting the smaller x x Add x Normalize – Check for Overflow and Underflow x 2 3
Round - Off significant digits
Round - Off significant digits Rounded Off
Round - Off significant digits Rounded Off What if ?
Round - Off significant digits Rounded Off What if ? 4.60 Round to even
Round - Off BinaryDecimal
Round - Off BinaryDecimal Are there any trailing 1’s ? If not, round to even.11.75
Floating Point Numbers Add x 2 3 and x Align the exponents by shifting the smaller x x Add x Normalize – Check for Overflow and Underflow x Round to 4 bits Guard bit = 1 and Round bit = 1
Floating Point Numbers Add x 2 3 and x Align the exponents by shifting the smaller x x Add x Normalize – Check for Overflow and Underflow x Round to 4 bits Guard bit = 1 and Round bit = x 2 3
IEEE 754 Floating Point Standard Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand bit E (8 bits) F (23 bits)
IEEE 754 Floating Point Standard Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand bit E (8 bits) F (23 bits) Bias Exponent E>0
IEEE 754 Floating Point Standard Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand bit E (8 bits) F (23 bits) Only Zero is F = 0 and E = 0 Simplifies data exchange Compare using integer processes Accuracy and round-off & Overflow and Underflow
IEEE 754 Floating Point Standard = =.3125
IEEE 754 Floating Point Standard = =.3125 E = = = 130
IEEE 754 Floating Point Standard = =.3125 E = = = 130 Number = (-1) S x ( 1 + F) x 2 E-127
IEEE 754 Floating Point Standard = =.3125 E = = = 130 Number = (-1) S x ( 1 + F) x 2 E-127 = – ( ) x – 127
IEEE 754 Floating Point Standard = =.3125 E = = = 130 Number = (-1) S x ( 1 + F) x 2 E-127 = – ( ) x – 127 = – x 2 3 = – x 8 = – 10.5
IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format
IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format 5 = x 2 0 = 1.01 x 2 2
IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format 5 = x 2 0 = 1.01 x 2 2 IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1bit E (8 bits) F (23 bits)
IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format 5 = x 2 0 = 1.01 x 2 2 IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1bit E (8 bits) F (23 bits) E –127 = 2 E = = 129 =
IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format 5 = x 2 0 = 1.01 x 2 2 IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1bit E (8 bits) F (23 bits) E –127 = 2 E = = 129 = F =
IEEE 754 Floating Point Standard Consider representing –5 in IEEE 754 Floating Point Format 5 = x 2 0 = 1.01 x 2 2 IEEE 754 (-1) S x ( 1 + F) x 2 E-127 s exponent+127 significand - 1 1bit E (8 bits) F (23 bits) E = = 129 = F =
IEEE 754 Floating Point Standard Normalized REAL Binary Number: ± 1.yyyyyyyyy x 2 eeee Double Precision IEEE 754 (-1) S x ( 1 + F) x 2 E-1023 s exponent+1023 significand bit E (11 bits) F (20 bits) significand – 1 (continued) F (32 bits)