Mikroprotsessorid PIC16F876A KÄSUD

Instruction decode – mis teha tuleb Loe mälust Töötle andmeid Kirjuta mällu

1FFFh + 1 = 0000h Käske täidetakse järjest. Peale igat käsku tehakse PC = PC + 1 Erandid: GOTO ja CALL

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> f Z dfffffff Decrement ff-1 --> f Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode

OPCODE OPCODE11-bitine aadress kkkkkkkkkkk OPCODE8-bitine Literal kkkkkkkk OPCODE3-bitine biti aadress bbb 7-bitine registri aadress fffffff OPCODEd=0: dest=W d=1: dest=f 7-bitine registri aadress fffffff PIC16F876A käskude struktuurAddress modes Käsud registriga Käsud bitiga Käsud konstandiga Absoluutne suunamine Käsud operandita

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> d Z dfffffff Decrement ff-1 --> d Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode OPCODEd=0: dest=W d=1: dest=f 7-bitine registri aadress fffffff f tähendab mõnda registrit sellest tabelist W tähendab Work registrit Kui dest=W, siis 1.võetakse registri f väärtus, 2.Tehakse sellega midagi 3.Tulemus pannakse W-sse 4.Register f ise ei muutu Kui dest=f, siis 1.võetakse registri f väärtus, 2.Tehakse sellega midagi 3.Tulemus pannakse f-sse tagasi 4.Register W ei muutu x3hSTATUSIRPRP1RP0_TO_PDZDCC Mälupanga number tuleb registrist STATUS

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> d Z dfffffff Decrement ff-1 --> d Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode OPCODEd=0: dest=W d=1: dest=f 7-bitine registri aadress fffffff Move Liida Lahuta Loogika Rotate Liida Lahuta + Tingimuslik suunamine

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> d Z dfffffff Decrement ff-1 --> d Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode OPCODE3-bitine biti aadress bbb 7-bitine registri aadress fffffff Biti seadmine Tingimuslik suunamine f tähendab mõnda registrit sellest tabelist bbb tähendab biti numbrit (0...7)

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> d Z dfffffff Decrement ff-1 --> d Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode OPCODE8-bitine Literal kkkkkkkk NB! Kõik Literali käsud on ainult registriga W Move Liida Lahuta Loogika Return

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> d Z dfffffff Decrement ff-1 --> d Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode OPCODE 11-bitine aadress kkkkkkkkkkk xAhPCLATHA12A11 Go Aadressi vanemad 2 bitti tulevad registrist PCLATH

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> d Z dfffffff Decrement ff-1 --> d Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby ModeSleep OPCODE

OPCODE OPCODE11-bitine aadress kkkkkkkkkkk OPCODE8-bitine Literal kkkkkkkk OPCODE3-bitine biti aadress bbb 7-bitine registri aadress fffffff OPCODEd=0: dest=W d=1: dest=f 7-bitine registri aadress fffffff PIC16F876A käskude struktuurAddress modes Käsud registriga Käsud bitiga Käsud konstandiga Absoluutne suunamine Käsud operandita

Port B Register = 0x55 Kirjuta Register Porti B Inverteeri Register Näide: Genereeri PortB abil impulsse

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> f Z dfffffff Decrement ff-1 --> f Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode Register = 0x55 Kirjuta Register Porti B Inverteeri Register

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> f Z dfffffff Decrement ff-1 --> f Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode AadressBinHex 0x55 -> W: Move Literal to W k->W11 00xx kkkk kkkk Register = 0x55 Kirjuta Register Porti B Inverteeri Register

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> f Z dfffffff Decrement ff-1 --> f Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode AadressBinHex 0x55 -> W: Move W to f W->f fff ffff W -> 20h: A00001 Register = 0x55 Kirjuta Register Porti B Inverteeri Register

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> f Z dfffffff Decrement ff-1 --> f Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode AadressBinHex 0x55 -> W: Move W to f W->f fff ffff W -> 20h: A00001 W -> PORTB: Register = 0x55 Kirjuta Register Porti B Inverteeri Register

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> f Z dfffffff Decrement ff-1 --> f Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode AadressBinHex 0x55 -> W: W -> 20h: A00001 W -> PORTB: Invert 20h: A00003 Complement f dfff ffff Register = 0x55 Kirjuta Register Porti B Inverteeri Register d=0: dest=W d=1: dest=f

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> f Z dfffffff Decrement ff-1 --> f Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode AadressBinHex 0x55 -> W: W -> 20h: A00001 W -> PORTB: Invert 20h: A00003 Move f to d dfff ffff 20h -> W: Register = 0x55 Kirjuta Register Porti B Inverteeri Register d=0: dest=W d=1: dest=f

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> f Z dfffffff Decrement ff-1 --> f Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode AadressBinHex 0x55 -> W: W -> 20h: A00001 W -> PORTB: Invert 20h: A Go to address 10 1kkk kkkk kkkk 20h -> W: Go to 0002: Register = 0x55 Kirjuta Register Porti B Inverteeri Register

Move Literal to Wk --> W 1100xxkkkk Move W to fW --> f Z fffffff Move f to df --> d Z dfffffff Clear W0 --> W Z xxxxxxx Clear f0 --> f Z fffffff Swap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff Add Literal and WW+k --> WCDCZ 11111xkkkk Add W and fW+f --> dCDCZ dfffffff Subtract Literal from WW-k --> WCDCZ 11110xkkkk Subtract f from WW-f --> dCDCZ dfffffff Increment ff+1 --> f Z dfffffff Decrement ff-1 --> f Z dfffffff AND Literal with WW.AND. k --> W Z kkkk AND W with fW.AND. f --> d Z dfffffff OR Literal with WW.OR. k --> W Z kkkk OR W with fW.OR. f --> d Z dfffffff XOR Literal with WW.XOR. k --> W Z kkkk XOR W with fW.XOR. f --> d Z dfffffff Complement ff --> d Z dfffffff Rotate f Left through carry C dfffffff Rotate f Right through carry C dfffffff Bit Clear bit b of f0 --> f(b) 0100bbbfffffff Bit Set bit b of f1 --> f(b) 0101bbbfffffff Go to address 101kkkkkkk Call subroutine 100kkkkkkk Return from subroutine Return with Literal in W 1101xxkkkk Return from Interrupt Bit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff Bit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff Decrement f, Skip if 0f-1->d, skip next if Z= dfffffff INcrement f, Skip if 0f+1->d, skip next if Z= dfffffff No Operation xx00000 Clear Watchdog Timer Go into Standby Mode AadressBinHex 0x55 -> W: W -> 20h: A00001 W -> PORTB: Invert 20h: A h -> W: Go to 0002: Tehtud!Kas see programm töötab ka? x3hSTATUSIRPRP1RP0_TO_PDZDCC xAhPCLATHA12A11 Registrite adresseerimisel peab Banga number olema registris STATUS! GOTO 2 vanemat bitti peavad olema registris PCLATH!

MOVLWkMove Literal to Wk --> W 1100xxkkkk MOVWFfMove W to fW --> f Z fffffff MOVFf,dMove f to df --> d Z dfffffff CLRW Clear W0 --> W Z xxxxxxx CLRFfClear f0 --> f Z fffffff SWAPFf,dSwap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff ADDLWkAdd Literal and WW+k --> WCDCZ 11111xkkkk ADDWFf,dAdd W and fW+f --> dCDCZ dfffffff SUBLWkSubtract Literal from WW-k --> WCDCZ 11110xkkkk SUBWFf,dSubtract f from WW-f --> dCDCZ dfffffff INCFf,dIncrement ff+1 --> f Z dfffffff DECFf,dDecrement ff-1 --> f Z dfffffff ANDLWkAND Literal with WW.AND. k --> W Z kkkk ANDWFf,dAND W with fW.AND. f --> d Z dfffffff IORLWkOR Literal with WW.OR. k --> W Z kkkk IORWFf,dOR W with fW.OR. f --> d Z dfffffff XORLWkXOR Literal with WW.XOR. k --> W Z kkkk XORWFf,dXOR W with fW.XOR. f --> d Z dfffffff COMFf,dComplement ff --> d Z dfffffff RLFf,dRotate f Left through carry C dfffffff RRFf,dRotate f Right through carry C dfffffff BCFf,bBit Clear bit b of f0 --> f(b) 0100bbbfffffff BSFf,bBit Set bit b of f1 --> f(b) 0101bbbfffffff GOTOkGo to address 101kkkkkkk CALLkCall subroutine 100kkkkkkk RETURN Return from subroutine RETLWkReturn with Literal in W 1101xxkkkk RETFIE Return from Interrupt BTFSCf,bBit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff BTFSSf,bBit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff DECFSZf,dDecrement f, Skip if 0f-1->d, skip next if Z= dfffffff INCFSZf,dINcrement f, Skip if 0f+1->d, skip next if Z= dfffffff NOP No Operation xx00000 CLRWDT Clear Watchdog Timer SLEEP Go into Standby Mode

MOVLWkMove Literal to Wk --> W 1100xxkkkk MOVWFfMove W to fW --> f Z fffffff MOVFf,dMove f to df --> d Z dfffffff CLRW Clear W0 --> W Z xxxxxxx CLRFfClear f0 --> f Z fffffff SWAPFf,dSwap nibbles in ff(7:4)(3:0)->f(3:0)(7:4) dfffffff ADDLWkAdd Literal and WW+k --> WCDCZ 11111xkkkk ADDWFf,dAdd W and fW+f --> dCDCZ dfffffff SUBLWkSubtract Literal from WW-k --> WCDCZ 11110xkkkk SUBWFf,dSubtract f from WW-f --> dCDCZ dfffffff INCFf,dIncrement ff+1 --> f Z dfffffff DECFf,dDecrement ff-1 --> f Z dfffffff ANDLWkAND Literal with WW.AND. k --> W Z kkkk ANDWFf,dAND W with fW.AND. f --> d Z dfffffff IORLWkOR Literal with WW.OR. k --> W Z kkkk IORWFf,dOR W with fW.OR. f --> d Z dfffffff XORLWkXOR Literal with WW.XOR. k --> W Z kkkk XORWFf,dXOR W with fW.XOR. f --> d Z dfffffff COMFf,dComplement ff --> d Z dfffffff RLFf,dRotate f Left through carry C dfffffff RRFf,dRotate f Right through carry C dfffffff BCFf,bBit Clear bit b of f0 --> f(b) 0100bbbfffffff BSFf,bBit Set bit b of f1 --> f(b) 0101bbbfffffff GOTOkGo to address 101kkkkkkk CALLkCall subroutine 100kkkkkkk RETURN Return from subroutine RETLWkReturn with Literal in W 1101xxkkkk RETFIE Return from Interrupt BTFSCf,bBit Test f, Skip if Clearskip next if f(b)=0 0110bbbfffffff BTFSSf,bBit Test f, Skip if Setskip next if f(b)=1 0111bbbfffffff DECFSZf,dDecrement f, Skip if 0f-1->d, skip next if Z= dfffffff INCFSZf,dINcrement f, Skip if 0f+1->d, skip next if Z= dfffffff NOP No Operation xx00000 CLRWDT Clear Watchdog Timer SLEEP Go into Standby Mode Aadress 0x55 -> W:0000 W -> 20h:0001 W -> PORTB: 0002 Invert 20h: h -> W:0004 Go to 0002:0005 PROCESSOR 16F876A #include "P16F876A.INC" ORG0x00 MOVLW0x55 MOVWF0x20 Loop MOVWFPORTB COMF0x20,1 MOVF0x20,0 GOTOLoop End 1:PROCESSOR 16F876A 2: #include "P16F876A.INC“ 3: 4: ORG0x00 5: MOVLW 0x556: MOVLW0x A0 MOVWF 0x207: MOVWF0x20 8: Loop MOVWF 0x69: MOVWFPORTB A0 COMF 0x20, F10: COMF0x20, MOVF 0x20, W11: MOVF0x20, GOTO 0x212: GOTOLoop Hex A A