Light weight readout cable simulations for inner barrel pixel readout Cs. Soos, J. Christiansen, M. Kovacs mark.istvan.kovacs@cern.ch 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

Inner pixel readout reminder Light weight cable options Outline Inner pixel readout reminder Light weight cable options 36 AWG twisted shielded pair Copper flex flat cable Aluminium flex flat cable Future work and conclusions 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

Layout sketches and modularity Jorgen Christiansen, January 2015 Disk layout to be updated 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

Jorgen Christiansen, January 2015 Cable options Cable option Wire size, diameter Wire resistance Mass for ~3500 cables % in signal pair % in shield/Gnd % in insulator 36AWG Twisted pair, Cu, with shield 125um 2.7 ohm 5.8 kg 27% 40% 33% 36AWG copper pair, Cu, no shield 3.5 kg 45% - 55% Twisted pair Cu with Polyimide insulation 1.8 kg 92% 8% Twisted pair, Cu cladded Alu, Polyimide insulation 125um Alu 5um Cu 4.0 ohm 0.7 kg 83% 17% Kapton flat cable, Cu 35um gnd plane 140x35um2 6.9 ohm 4.0 kg 15% 30% Kapton flat cable, Cu 10um gnd mesh 1.5 kg 10% 50% Kapton flat cable, Alu 35um gnd plane 11.5 ohm 2.0 kg 32% 58% Kapton flat cable, Alu 10um gnd mesh 1.0 kg 20% 5% 75% * Red coloured ones were simulated Jorgen Christiansen, January 2015 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

S parameters Scattering parameters matrix is describing electrical behaviour of linear circuits. The matrix can be composed of several ports, in our case it is a 4 port element matrix. By obtaining S parameters of a linear network, we can simulate it in most of the simulators. S parameters can be measured by different instruments for example a Vector Network Analyser. S parameters can be extracted from CAD designs using 3D solvers, for example transmission lines from a PCB design can be simulated before production. The obtained S parameters can be exported to a file and can be used by chip designers or PCB designers to simulate and validate a design before production. 4 port network Port 1 Port 3 Port 2 Port 4 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

FFE – Feed Forward Equalization Feed Forward Equalization is used to improve signal quality Used in high speed signal drivers when conventional drivers are not sufficient In general it adjusts the waveform being injected into the channel to compensate for frequency-dependent losses suffered during propagation The basic idea is to replace a single driver with a series of drivers, each one is delayed by a set amount from the previous one. These driver are called taps. In Ansoft Designer the tap weights can be optimized and automatically calculated by an algorithm called Zero-Forcing Equalizer (ZFE) 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

36 AWG twisted shielded pair Ansys designer built-in twinax cable model was simulated Model is parametrized to match the geometry of an existing cable A 2.7m length cable samples S parameters have been measured to compare results A Vector Network Analyzer was used to obtain S parameters of the cable sample 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

36 AWG twisted shielded pair S parameters Built-in model’s S parameters with TAND= 0.008 loss dielectric and 2 m length Insertion loss Return loss 4 port network Port 1 Port 3 Port 2 Port 4 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

36 AWG twisted shielded pair S parameters Built-in model’s S parameters with TAND= 0.008 loss dielectric and 2,7m length Insertion loss Return loss 4 port network Port 1 Port 3 Port 2 Port 4 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

36 AWG twisted shielded pair S parameters S parameters measured with VNA of a 2,7m twinax (blue) cable Return loss Insertion loss 4 port network Port 1 Port 3 Port 2 Port 4 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

36 AWG twisted shielded pair Eye diagrams Eye diagrams simulated on 1.2Gbps, measurement vs simulation Eye diagram simulation using FFE on built-in cable model, L=2.7m TD=0.008, 1.2Gbps Eye diagram simulation on built-in cable model, L=2.7m TD=0.008, 1.2Gbps Eye diagram simulation using FFE on measured S parameters , L=2.7m TD=0.008, 1.2Gbps Eye diagram simulation on measured S parameters, L=2.7m TD=0.008, 1.2Gbps 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

36 AWG twisted shielded pair Eye diagrams Eye diagrams on built in model, 1.2Gbps VS 2.4Gbps VS Feed Forward Equalization Eye diagram simulated on built-in model, L=2 m TD=0.008, 1.2Gbps Eye diagram simulated on built-in model, L=2 m TD=0.008, 1.2Gbps with FFE Eye diagram simulated on built-in model, L=2 m TD=0.008, 2.4Gbps Eye diagram simulated on built-in model, L=2 m TD=0.008, 2.4Gbps with FFE 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

Copper flex flat cable with 8 differential pairs Real size layout with Zero Insertion Force connector One cable contains 8 differential pairs, cable width is 8.5mm Easy and light connector options 140µm line width, 180µm gap, 35µm copper thickness S parameter model extracted by Ansys Siwave More conductors can be added if needed 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

Copper flat flex cable with 8 differential pairs Extracted S parameters of one differential pair from 2m copper flex cable design 4 port network Port 1 Port 3 Port 2 Port 4 Insertion loss Return loss 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

Copper flat flex cable with 8 differential pairs Eye diagrams on copper flex cable, 1.2Gbps VS 2.4Gbps VS Feed Forward Eq. Eye diagram simulated on extracted S parameters of flex circuit design, L=2 m TD=0.008, 1.2Gbps Eye diagram simulated on extracted S parameters of flex circuit design, L=2 m TD=0.008, 1.2Gbps with FFE Eye diagram simulated on extracted S parameters of flex circuit design, L=2 m TD=0.008, 2.4Gbps Eye diagram simulated on extracted S parameters of flex circuit design, L=2 m TD=0.008, 2.4Gbps with FFE 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

Aluminum flat flex cable with 8 differential pairs Extracted S parameters of one differential pair from 2m aluminium flex cable 4 port network Port 1 Port 3 Port 2 Port 4 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

Aluminum flex cable with 8 differential pairs Eye diagrams on aluminium flex cable, 1.2Gbps VS 2.4Gbps VS Feed Forward Eq. Eye diagram simulated on extracted S parameters of flex circuit design, L=2 m TD=0.008, 1.2Gbps Eye diagram simulated on extracted S parameters of flex circuit design, L=2 m TD=0.008, 1.2Gbps with FFE Eye diagram simulated on extracted S parameters of flex circuit design, L=2 m TD=0.008, 2.4Gbps Eye diagram simulated on extracted S parameters of flex circuit design, L=2 m TD=0.008, 2.4Gbps with FFE 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

Conclusions and future work Carry out simulations on meshed plane flex cables and unshielded twisted pairs. Conclusions: The simulation results are well in line with measurement results. Lightweight cables can be designed on flexible substrate with connectors embedded. The simulated eyes are open on 1.2Gbps for almost all cable options without FFE. In some cases signal quality requires Feed Forward Equalization on higher speeds. Significant signal quality improvement can be achieved by using Feed Forward Equalization. 21/MAY/2015 Light weight cable simulations for inner barrel pixel readout

Feed-Forward Equalization Equalization is one of the principal methods for improving the signal integrity of a channel. In general, equalization adjusts the waveform being injected into the channel to compensate for frequency-dependent losses suffered during propagation. For example, since many channels attenuate high-frequencies more than low frequencies, a simple form of equalization boosts high frequencies as the signal leaves the driver. Feed-forward equalization (FFE) is an extended form of frequency enhancement. The basic idea of FFE is to replace a single driver with a series of drivers, each one delayed by a set amount from the previous one. The delay is most commonly the unit interval (UI). These drivers are called taps. Each tap drives with a given strength, called the tap weight. The tap weights are set so as to reduce intersymbol interference (ISI). FFE can be applied either at the driver side or at the receiver side, although driver side FFE is more straightforward and easier to understand. This discussion applies to the driver side FFE. The algorithm for automatically calculating the tap weights in QuickEye and VerifEye is the Zero-Forcing Equalizer (ZFE). The ZFE algorithm is invoked when the FFE weights are not given but a nonzero number of taps is specified. The algorithm starts with the response to the channel of a pulse with width equal to one UI. (Neglecting jitter, the response of a channel can be considered to be composed of the response to appropriately-placed positive and negative half-height pulses.) A system of equations is set up, with the tap weights as the variables. The goal is to make the total response zero at the time points corresponding to the center of the eye for ISI for a number of bits equal to the number of FFE taps specified. Solving this system of equations yields the desired tap weights. In QuickEye and VerifEye, the tap weights are then applied to the step response calculated using the transient analysis engine of Nexxim. This equalized step response becomes the input to the rest of the eye diagram calculation. Figures 7 and 8 show QuickEye analyses without equalization and with FFE. Decision-Feedback Equalization As in FFE, the number of DFE taps determine the number of unit intervals over which equalization is to operate. The decision-feedback equalizer keeps the results of the decision on the state of previous bits, then applies the weighted tap values to the previous bit waveforms to minimize ISI for the transition to the current bit state. The DFE weights can be automatically calculated using an algorithm similar to the algorithm used for FFE. While the FFE taps work towards canceling ISI both before the UI (precursors) and after the UI (post-cursors), DFE taps are limited to canceling post-cursors, because of the need to make a decision on a bit before its effect can be dealt with. Figure 11 shows the QuickEye analysis of the same high-speed serial channel shown in Figure 8, but with 4 taps of DFE.