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Worst-Case Timing Jitter and Amplitude Noise in Differential Signaling Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti, and Yu Hu Electrical Engineering Dept.,

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Presentation on theme: "Worst-Case Timing Jitter and Amplitude Noise in Differential Signaling Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti, and Yu Hu Electrical Engineering Dept.,"— Presentation transcript:

1 Worst-Case Timing Jitter and Amplitude Noise in Differential Signaling Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti, and Yu Hu Electrical Engineering Dept., UCLA Speaker: (This research is partially supported by NSF and Actel.)

2 High-Speed Link Research Used to focus on making chip fast  Require precision timing – PLL  Require high-speed transmitter, receiver circuitry Now, the bandwidth limit is in wires System-level link performance How to evaluate the link performance?  A framework is required to evaluate trade-offs Chip On-board chip-to-chipOn-chipBackplane

3 Outline Introduction  Transmission Environment  Eye Diagram and Eye Mask  Timing Jitter and Amplitude Noise Formula-based Jitter and Noise Model Worst-case Jitter and Noise Experimental Results Conclusions

4 Transmission Environment Channel Aattenuation  Dispersion Reflection  Impedance mismatch Inter-symbol interference  Band-limited channel Crosstalk  Capacitive or Inductive coupling Other random noises  ex: circuit thermal noise

5 Eye Diagram Standard measure for signaling Synchronized superposition of all possible realizations of the signal viewed within a particular interval Obtained from measurement or transient simulation

6 Eye Diagram (cont’d) Timing jitter  Deviation of the zero-crossing from its ideal occurrence time Amplitude noise  Set by signal-to-noise ratio (SNR)  The amount of noise at the sampling time

7 Existing Work Eye diagram analysis  Analytical eye-diagram model [Hashimoto, CICC’07] Only consider attenuation and reflection Assume perfect match at transmitter end Jitter and noise analysis  Data-dependent jitter model [Buckwalter, MicrowaveSymp’04][Ou’DTS’04] Only consider two taps of channel response Enumerate all possible input combinations: [00, 01, 10, 11]  Clock jitter model [Hanumolu’04][Tao’99] Clock-data recovery (CDR), DLL, PLL  Amplitude noise model [Hanumolu’05] No general framework to model the jitter and noise and find out what is the worst possible scenario

8 Eye Mask Wider eye = more timing margin Higher eye = more noise margin How to determine if the eye satisfies the mask or not  Find the worst-case jitter and noise PCI-Express

9 Contribution Formula-based model for jitter and noise  Use differential signaling as an example  Utilize multi-conductor transmission line equations  Can be extended to equalized link Consider the pre-emphasis filter at the transmitter end Worst-case jitter and noise  Directly find the worst-case input pattern  Use efficient mathematical programming algorithms No need for time-consuming simulation  Runtime is not determined by the pattern length Adequate length can be used according to channel response

10 Outline Introduction Formula-based Jitter and Noise Model Worst-case Jitter and Noise Experimental Results Conclusions

11 Channel Response  Response p(t) for NRZ symbol s(t): step response  Differential microstrip line Extract R, Ls, Lm, C, Cc Per-unit-length RLGC matrix  Solve the multi-conductor distributed transmission line equations Here we have a two-conductor special case H(s): frequency response where

12 Channel Response (cont’d) Frequency response compared to SPICE Pole-residue approximation SPICE

13 Pre-emphasis Filter Pre-emphasis filter  Pre-filter the pulse with the inverse of the channel  a i : input symbol  b i : transmitter output  W j : filter coefficient At receiver end

14 Timing jitter  Time deviation of zero-crossing where  V th defines the zero level  t 0 is the crossing time without interference from other symbol or neighboring link  t 1 is the actual crossing time Jitter Model received waveform V th input pattern t0t0 t1t1 t1t1 t1t1 r(t)p(t)

15 Noise Model Amplitude noise  amplitude variation at sampling time t s where tsts p(t) r(t) r(t s ) p(t s ) input pattern

16 Outline Introduction Formula-based Jitter and Noise Model Worst-case Jitter and Noise Experimental Results Conclusions

17 Worst-case amplitude noise Problem Formulation Worst-case timing jitter - Integer linear programming -Integer non-convex programming

18 Worst-Case Amplitude Noise Linear Programming worst-case noise = (worst positive noise) – (worst negative noise) =

19 Worst-Case Timing Jitter Monte Carlo simulation  Test with random input patterns  Efficiency and reliability Relaxation-based binary search feasibility problem Can not guarantee optimum But provides more reliable worst-case

20 Relaxation Based Binary Search

21 Outline Introduction Formula-based Jitter and Noise Model Worst-case Jitter and Noise Experimental Results Conclusions

22 Experimental Setup Channel  RLGC matrix extracted form differential microstrip line Termination and matching  50 ohm resistor with capacitive loading

23 Jitter and Noise Model Validation Jitter and noise model validation, compared to SPICE  Given the same input pattern (one set of 100 symbols) Timing domain simulation comparison SPICE Our Model

24 Worst-case Jitter and Noise Worst-case jitter and noise, compared to Monte Carlo  Use the same model  Monte Carlo simulation with 10000 sets inputs  Consider 40 symbol length for time domain response Achieve more reliable worst-case results  with 150X speedup 150X speedup

25 Outline Introduction Formula-based Jitter and Noise Model Worst-case Jitter and Noise Experimental Results Conclusions

26 Formula-based models for jitter and noise are proposed  Use differential signaling as an example ISI, correlated-crosstalk and pre-emphasis filter are considered in the model Efficient mathematical method is proposed to calculate worst- case jitter and noise  Directly find the worst-case input pattern  Runtime is not determined by the pattern length Future work  BER metric with statistical analysis  Consider the impact of clock

27 Thank you !


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