305221, 226231 Computer Electrical Circuit Analysis การวิเคราะห์วงจรไฟฟ้าทาง คอมพิวเตอร์ 3(2-3-6) ณรงค์ชัย มุ่งแฝงกลาง คมกริช มาเที่ยง สัปดาห์ที่ 3 Nodal.

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305221, Computer Electrical Circuit Analysis การวิเคราะห์วงจรไฟฟ้าทาง คอมพิวเตอร์ 3(2-3-6) ณรงค์ชัย มุ่งแฝงกลาง คมกริช มาเที่ยง สัปดาห์ที่ 3 Nodal and Mesh Analysis

Outline Objectives 1 Reviews 2 Nodal Analysis 3 Mesh Analysis 4 Source Transform 5

Objectives  เพื่อให้นิสิตมีความรู้ความเข้าใจเกี่ยวกับ Nodal Analysis  เพื่อให้นิสิตมีความรู้ความเข้าใจเกี่ยวกับ Mesh Analysis  เพื่อให้นิสิตมีความรู้ความเข้าใจเกี่ยวกับ Supernodal Analysis  เพื่อให้นิสิตมีความรู้ความเข้าใจเกี่ยวกับ Supermesh Analysis  เพื่อให้นิสิตมีความรู้ความเข้าใจเกี่ยวกับ Source Transform

Outline Objectives 1 Reviews 2 Nodal Analysis 3 Mesh Analysis 4 Source Transform 5

 Ohm’s law states that “the voltage v across a resistor is directly proportional to the current i flowing through the resistor”. Ohm’s Law (cont.) Note : 1  = 1 V/A

Power

Example of Power Consumption  From the figure, determine the current i and the power.

Branch  Matthew Sadiku, define A branch represents a single element such as a voltage source or a resistor.  William Hayt, define a branch as a single path in a network, composed of one simple element and the node at each end of that element. Branch

Node  Matthew Sadiku, a node is the point of connection between two or more branches.  William Hayt, a point at which two or more elements have a common connection is called “a node”. Node

Loop  Matthew Sadiku, A loop is any closed path in a circuit.  William Hayt, If the node at which we started is the same as the node on which we ended, then the path is, by definition, a closed path or “a loop”.

Kirchhoff’s Current Law  Kirchhoff’s current law (KCL) states that “the algebraic sum of currents entering a node (or leaving the node) is zero”.

Kirchhoff’s Voltage Law  Kirchhoff’s voltage law (KVL) states “that the algebraic sum of all volt-ages around a closed path (or loop) is zero”.

Equivalent of Series Resistors  The equivalent resistance of any number of resistors connected in series is the sum of the individual resistances.

Voltage Division

Voltage Division Example

Parallel Resistors  The equivalent resistance of two parallel resistors is equal to the product of their resistances divided by their sum.

Equivalent Conductances  The equivalent conductance of resistors connected in parallel is the sum of their individual conductances.

Current Division

Current Division Example

Outline Objectives 1 Reviews 2 Nodal Analysis 3 Mesh Analysis 4 Source Transform 5

Nodal Analysis  Step to determine voltages: 1. Select a node as the reference node. Assign voltages v1,v2,…vn-1 to the remaining n-1 nodes. The voltages are referenced with respect to the reference node. 2. Apply KCL to each of the n-1 non-reference nodes. Use Ohm’s law to express the branch current in terms of node voltage. 3. Solve the resulting simultaneous equations to obtain the unknown node voltages.

Nodal Analysis : Step 1 Assign voltages Reference Node Node Symbol for reference node

Nodal Analysis : Step 2 and 3  Apply KCL:  Apply ohm’s law  Then solve equation

Nodal Analysis Example 2. Assign Voltages 1. Reference Node

At node 1 : 1 At node 2 : 2 At node 3 : 3 Nodal Analysis Example (cont.)

Adding Eq.1 and 3 obtain : 4 Adding Eq.2 and 3 obtain : 5 Nodal Analysis Example (cont.)

Substituting Eq. 5 into Eq. 4 : From Eq. 3: Answer : Nodal Analysis Example (cont.)

Nodal Analysis with Voltage Source  A supernode is formed by enclosing a (dependent or independent) voltage source connected between two non-reference nodes and any elements connected in parallel with it.

Apply KCL: Or : Nodal Analysis with Voltage Source (cont.)

Redraw : Apply KVL :

Nodal Analysis with Voltage Source Example Supernode

Nodal Analysis with Voltage Source Example Apply KCL : i 1 Apply KVL : 2 Substituting Eq. 2 into Eq. 1 :

Summary of Supernode Analysis Procedure 1.Count the number of nodes (N). 2. Designate a reference node. The number of terms in your nodal equations can be minimized by selecting the node with the greatest number of branches connected to it. 3. Label the nodal voltages(there are N − 1 of them). 4. If the circuit contains voltage sources, form a supernode about each one. This is done by enclosing the source, its two terminals, and any other elements connected between the two terminals within a broken-line enclosure. 5. Write a KCL equation for each nonreference node and for each supernode that does not contain the reference node. Sum the currents flowing into a node/supernode from current sources on one side of the equation. On the other side, sum the currents flowing out of the node/supernode through resistors. Pay close attention to “−” signs.

6. Relate the voltage across each voltage source to nodal voltages. This is accomplished by simple application of KVL; one such equation is needed for each supernode defined. 7. Express any additional unknowns (i.e., currents or voltages other than nodal voltages) in terms of appropriate nodal voltages. This situation can occur if dependent sources appear in our circuit. 8. Organize the equations. Group terms according to nodal voltages. 9. Solve the system of equations for the nodal voltages (there will be N − 1 of them). Summary of Supernode Analysis Procedure

Outline Objectives 1 Reviews 2 Nodal Analysis 3 Mesh Analysis 4 Source Transform 5

Mesh Definition  A Mesh is a loop which does not contain any other loop within it.

 Steps to determine Mesh current: 1. Assign mesh currents i 1, i 2, …, i n to the n meshes. 2. Apply KVL to each of the n meshes. Use Ohm’s law to express the voltages in terms of the mesh current. 3. Solve the resulting n simultaneous equations to get the mesh currents. Mesh Analysis

Mesh Analysis : Step 1 Assign mesh current

Apply KVL to each mesh Mesh i 1 : Mesh i 2 : Mesh Analysis : Step 2

Solve the resulting : Mesh Analysis : Step 3

Mesh Analysis Example Assign mesh current

Apply KVL for mesh 1 : Or 1 Apply KVL for mesh 2 : Or 2 Mesh Analysis Example (cont.)

Substituting Eq.2 into Eq.1 : From Eq.2 : Answers: Mesh Analysis Example (cont.)

Mesh Analysis with Current Source CASE 1 : When set i 2 =-5A and write a mesh equation for other mesh:

Apply KVL : Or CASE 2: Mesh Analysis with Current Source

At node 0, Apply KCL : Solving equation, obtain : Mesh Analysis with Current Source

Supermesh Mesh Analysis with Current Source Example

Apply KVL to supermesh : Or Apply KCL to node P : 12 Mesh Analysis with Current Source Example

Apply KCL to node Q : But : Apply KVL to mesh 4 : 43 Or Mesh Analysis with Current Source Example

From Eq.1 to Eq.4 : Mesh Analysis with Current Source Example

Summary of Supermesh Analysis Procedure 1. Determine if the circuit is a planar circuit. If not, perform nodal analysis instead. 2. Count the number of meshes(M). Redraw the circuit if necessary. 3. Label each of the M mesh currents. Generally, defining all mesh currents to flow clockwise results in a simpler analysis. 4. If the circuit contains current sources shared by two meshes, form a supermesh to enclose both meshes. A highlighted enclo-sure helps when writing KVL equations. 5. Write a KVL equation around each mesh/supermesh. Begin with a convenient node and proceed in the direction of the mesh current. Pay close attention to “ −” signs. If a current source lies on the periphery of a mesh, no KVL equation is needed and the mesh current is determined by inspection.

6. Relate the current flowing from each current source to mesh currents. This is accomplished by simple application of KCL; one such equation is needed for each supermesh defined. 7. Express any additional unknowns such as voltages or currents other than mesh currents in terms of appropriate mesh currents. This situation can occur if dependent sources appear in our circuit. 8. Organize the equations. Group terms according to nodal voltages. 9. Solve the system of equations for the mesh currents (there will be M of them). Summary of Supermesh Analysis Procedure

Outline Objectives 1 Reviews 2 Nodal Analysis 3 Mesh Analysis 4 Source Transform 5

 Source Transform is the process of replacing a voltage source V s in series with a resistor R by a current source i s in parallel with a resistor R, or vice versa.

Source Transform Example

Source Transform Example (cont.)

Assignment s  Matthew Sadiku : 3.4, 3.15, 3.18, 3.19 and 3.46  William Hayt : 10, 12, 13, 15, 22, 23, 40, 45 and 46