PR-DLS Motherboard Training for TSD & RMA engineers.

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Presentation transcript:

PR-DLS Motherboard Training for TSD & RMA engineers

PR-DLS Specification - 1 Processor Supports SMP (Symmetrical Multi-Processor) dual processors MPS (Multi-Processor Specification) rev 1.4 compliant Supports 604-pin INT-mPGA Intel Foster / Prestonua / Gallatin up to 2.4G+Hz FSB 400Mhz support Chipset RCC Grand Champion LE Server 2.0 (GCLE) RCC Champion South Bridge 5.0 (CSB5) RCC Champion IO Bridge X2 (CIOBX2) Support PC1600 DDR SDRAM interface (Registered DIMM only) Support PCI to PCI Transfer Support two channel 64-bit/133Mhz PCI bus

PR-DLS Specification - 2 System Memory 6 x 184-pin DIMM sockets support 128MB to 2 GB PC1600 registered DIMM module Two-way Interleaved (144bit) ECC DIMM Slot 1 x PCI-32bit/33Mhz 5V slot 5 x PCI-64bit/133Mhz 3V slots

PR-DLS Specification - 3 Onboard I/O 1 x PS/2 Keyboard Port, 1 x PS/2 Mouse Port 1 x Floppy Port (Up to 2.88MB, 3 Mode) 2 x ATA-100 IDE connectors 2 x external USB Ports (Support Hot-Plug Function) 2 x on-board USB connectors 1 x external Serial Port, 1 x internal Serial Port connector 1 x Parallel Port ( ECP, EPP Port) 1 RJ-45 10/100/1000 LAN ports /w LED 1 RJ-45 10/100 LAN ports /w LED 1 15-pin VGA port 2 68-pin Ultra160/320 SCSI connector 2 Feature connector (for IPMI solution)

PR-DLS Specification - 4 Onboard IDE Dual channel Bus Master IDE ports supports ATA-100, Multi-Word DMA Mode 2, PIO Mode 3/4 ATAPI IDE CD-ROM, CD-R, CD-RW and LS-120 Supported Onboard SCSI Dual Channel Ultra160/320 SCSI LSI 1010R/ bit/66Mhz/133Mhz SCSI controller Onboard LAN 1x Intel 82544GC LAN Chip on Board Support 10/100/1000Mb/sec 1x Intel LAN Chip on Board Support 10/100Mb/sec

PR-DLS Specification - 5 Special Features System Auto Speed Down While CPU Overheat Wake-up on Ring, LAN Previous State/Off Setup of AC Recovery from Power Failure BIOS 4Mbit Flash memory Award BIOS with Enhanced Server, ACPI, DMI, Green, PnP Features Plus, VGA & SCSI BIOS Year 2000 Test Approved Board Size EATX (12” x 13”)

PR-DLS PCB Placement

PR-DLS System Block Diagram

PR-DLS Power-on and Reset Diagram

RCC GCLE RCC GCLE CPU CPUCLK 1,2 (100MHz) CLK Gen ICS CLK Gen ICS CMICCK(100MHz) DIMM x 6 CLOCK BUFFER CLOCK BUFFER DCLK 0,1,2,3,4,5 FB_IN PR-DLS Clock Generator Circuit - 1 LEDDRCK (100MHz) 14MHz ICS ICS RCC CSB5 RCC CSB5 ASIC AS99127 ASIC AS99127 ATI RAGE XL ATI RAGE XL CSB514M ASIC14M VGA14M CLOCK BUFFER 2510 CLOCK BUFFER MHz 33MFIN CSB5CK VGAPCLK LAN CLK SIOCK PCI6CK 48MHz 25Mhz K

CLK Gen ICS CLK Gen ICS SCSI LSI 1010R SCSI LSI 1010R RCC CIOBX2 B RCC CIOBX2 B PCI x 3 PR-DLS Clock Generator Circuit -2 Intel 82544GC Intel 82544GC RCC CIOBX2 A RCC CIOBX2 A CLOCK BUFFER 2510 CLOCK BUFFER MHz CIOBX22CK CIOBX2CK PCI1PCLK GIGAPCLK PCI2,3,4CLK PCI5CLK SCSIPCLK P3,P4CLKFB P1,P2CLKFB 40MHz

PR-DLS PCI IRQ Routing Table Device/SlotBus No. Device No./IDSEL INTAINTBINTCINTD 10/100 LOM0AD18PCIIRQ2# PCI VGA0AD19PCIIRQ30 # PCI60AD20PCIIRQ10 # PCIIRQ27#PCIIRQ28#PCIIRQ29# PCI21AD18PCIIRQ4#PCIIRQ15#PCIIRQ16#PCIIRQ17# PCI31AD19PCIIRQ5#PCIIRQ18#PCIIRQ19#PCIIRQ20# PCI41AD20PCIIRQ8#PCIIRQ21#PCIIRQ22#PCIIRQ23# PCI52AD18PCIIRQ9#PCIIRQ24#PCIIRQ6#PCIIRQ7# LSI 53C1010R/1030 2AD20PCIIRQ6#PCIIRQ7# 10/100/GbE LOM 3AD18PCIIRQ3# PCI14AD18PCIIRQ1#PCIIRQ12#PCIIRQ13#PCIIRQ14#

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