Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/2006 KEEE 4426 VLSI WEEK 3 CHAPTER 1 MOS Capacitors (PART 2) CHAPTER 1.

Slides:



Advertisements
Similar presentations
6.1 Transistor Operation 6.2 The Junction FET
Advertisements

6.4.3 Effect of real surfaces Departure from the ideal case is due to Work function difference between the doped polysilicon gate and substrate The inevitably.
The MOS Transistor Polysilicon Aluminum.
Chapter 6 The Field Effect Transistor
EE466: VLSI Design Lecture 02 Non Ideal Effects in MOSFETs.
ECE 4339: Physical Principles of Solid State Devices
Lecture 11: MOS Transistor
Introduction to VLSI Circuits and Systems, NCUT 2007 Chapter 6 Electrical Characteristic of MOSFETs Introduction to VLSI Circuits and Systems 積體電路概論 賴秉樑.
Spring 2007EE130 Lecture 34, Slide 1 Lecture #34 OUTLINE The MOS Capacitor: MOS non-idealities (cont.) V T adjustment Reading: Chapter 18.3.
Lecture 15 OUTLINE MOSFET structure & operation (qualitative)
Metal-Oxide-Semiconductor (MOS)
EE415 VLSI Design The Devices: MOS Transistor [Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]
Lecture 10: PN Junction & MOS Capacitors
Department of EECS University of California, Berkeley EECS 105 Fall 2003, Lecture 8 Lecture 8: Capacitors and PN Junctions Prof. Niknejad.
Week 8b OUTLINE Using pn-diodes to isolate transistors in an IC
Spring 2007EE130 Lecture 30, Slide 1 Lecture #30 OUTLINE The MOS Capacitor Electrostatics Reading: Chapter 16.3.
EE105 Fall 2007Lecture 16, Slide 1Prof. Liu, UC Berkeley Lecture 16 OUTLINE MOS capacitor (cont’d) – Effect of channel-to-body bias – Small-signal capacitance.
MOS Capacitors ECE Some Classes of Field Effect Transistors Metal-Oxide-Semiconductor Field Effect Transistor ▫ MOSFET, which will be the type that.
EXAMPLE 3.1 OBJECTIVE Solution Comment
Depletion Region ECE Depletion Region As electrons diffuse from the n region into the p region and holes diffuse from the p region into the n region,
Semiconductor Devices III Physics 355. Transistors in CPUs Moore’s Law (1965): the number of components in an integrated circuit will double every year;
EE 466: VLSI Design Lecture 03.
ECE 342 Electronic Circuits 2. MOS Transistors
Basic Equations for Device Operation
EXAMPLE 8.1 OBJECTIVE To determine the time behavior of excess carriers as a semiconductor returns to thermal equilibrium. Consider an infinitely large,
Norhayati Soin 06 KEEE 4426 WEEK 7/1 6/02/2006 CHAPTER 2 WEEK 7 CHAPTER 2 MOSFETS I-V CHARACTERISTICS CHAPTER 2.
Introduction to Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) Chapter 7, Anderson and Anderson.
EXAMPLE 6.1 OBJECTIVE Fp = 0.288 V
EXAMPLE 9.1 OBJECTIVE pn(xn) = 2.59  1014 cm3
ENE 311 Lecture 9.
© 2012 Eric Pop, UIUCECE 340: Semiconductor Electronics ECE 340 Lecture 30 Metal-Semiconductor Contacts Real semiconductor devices and ICs always contain.
1 Fundamentals of Microelectronics  CH1 Why Microelectronics?  CH2 Basic Physics of Semiconductors  CH3 Diode Circuits  CH4 Physics of Bipolar Transistors.
NMOS PMOS. K-Map of NAND gate CMOS Realization of NAND gate.
ELECTRONICS II VLSI DESIGN FALL 2013 LECTURE 4 INSTRUCTOR: L.M. HEAD, PhD ELECTRICAL & COMPUTER ENGINEERING ROWAN UNIVERSITY.
ECE 4339 L. Trombetta ECE 4339: Physical Principles of Solid State Devices Len Trombetta Summer 2007 Chapters 16-17: MOS Introduction and MOSFET Basics.
Norhayati Soin 06 KEEE 4426 WEEK 3/1 9/01/2006 KEEE 4426 VLSI WEEK 3 CHAPTER 1 MOS Capacitors (PART 1) CHAPTER 1.
Lecture 18 OUTLINE The MOS Capacitor (cont’d) – Effect of oxide charges – Poly-Si gate depletion effect – V T adjustment Reading: Pierret ; Hu.
ECE442: Digital ElectronicsCSUN, Spring-2010-Zahid MOS Transistor ECE442: Digital Electronics.
UNIT I MOS TRANSISTOR THEORY AND PROCESS TECHNOLOGY
Structure and Operation of MOS Transistor
Lecture 18 OUTLINE The MOS Capacitor (cont’d) – Effect of oxide charges – V T adjustment – Poly-Si gate depletion effect Reading: Pierret ; Hu.
Introduction to MOS Transistors Section Outline Similarity Between BJT & MOS Introductory Device Physics Small Signal Model.
Norhayati Soin 06 KEEE 4426 WEEK 3/2 20/01/2006 KEEE 4426 VLSI WEEK 4 CHAPTER 1 MOS Capacitors (PART 3) CHAPTER MOS Capacitance.
Network for Computational Nanotechnology (NCN) UC Berkeley, Univ.of Illinois, Norfolk State, Northwestern, Purdue, UTEP First Time User Guide to MOSCAP*
The MOS Transistor Polysilicon Aluminum. The NMOS Transistor Cross Section n areas have been doped with donor ions (arsenic) of concentration N D - electrons.
MOS Capacitors UoG-UESTC Some Classes of Field Effect Transistors Metal-Oxide-Semiconductor Field Effect Transistor ▫ MOSFET, which will be the.
MOSFET Current Voltage Characteristics Consider the cross-sectional view of an n-channel MOSFET operating in linear mode (picture below) We assume the.
CHAPTER 6: MOSFET & RELATED DEVICES CHAPTER 6: MOSFET & RELATED DEVICES Part 2.
CHAPTER 4: P-N JUNCTION Part I.
Introduction to semiconductor technology. Outline –6 Junctions Metal-semiconductor junctions –6 Field effect transistors JFET and MOS transistors Ideal.
© 2012 Eric Pop, UIUCECE 340: Semiconductor Electronics ECE 340 Lecture 38 MOS capacitor Threshold Voltage Inversion: at V > V T (for NMOS), many electrons.
Integrated Circuit Devices
Metal-oxide-semiconductor field-effect transistors (MOSFETs) allow high density and low power dissipation. To reduce system cost and increase portability,
Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 2, slide 1 Introduction to Electronic Circuit Design.
© S.N. Sabki CHAPTER 6: MOSFET & RELATED DEVICES CHAPTER 6: MOSFET & RELATED DEVICES.
MOS capacitor before joining The metallic gate may be replaced with a heavily doped p+ polysilicon gate. The Fermi energy levels are approximately at.
The MOS capacitor. (a) Physical structure of an n+-Si/SiO2/p-Si MOS capacitor, and (b) cross section (c) The energy band diagram under charge neutrality.
MOS CAPACITOR Department of Materials Science & Engineering
EE130/230A Discussion 10 Peng Zheng.
Damu, 2008EGE535 Fall 08, Lecture 21 EGE535 Low Power VLSI Design Lecture #2 MOSFET Basics.
MOS Transistor Theory The MOS transistor is a majority carrier device having the current in the conducting channel being controlled by the voltage applied.
CHAPTER 6: MOSFET & RELATED DEVICES CHAPTER 6: MOSFET & RELATED DEVICES Part 1.
Lecture 18 OUTLINE The MOS Capacitor (cont’d) Effect of oxide charges
Revision CHAPTER 6.
ECE574 – Lecture 3 Page 1 MA/JT 1/14/03 MOS structure MOS: Metal-oxide-semiconductor –Gate: metal (or polysilicon) –Oxide: silicon dioxide, grown on substrate.
Sung June Kim Chapter 16. MOS FUNDAMENTALS Sung June Kim
EXAMPLE 7.1 BJECTIVE Determine the total bias current on an IC due to subthreshold current. Assume there are 107 n-channel transistors on a single chip,
6.1 Transistor Operation 6.2 The Junction FET
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Sung June Kim Chapter 18. NONIDEAL MOS Sung June Kim
Presentation transcript:

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/2006 KEEE 4426 VLSI WEEK 3 CHAPTER 1 MOS Capacitors (PART 2) CHAPTER 1

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ MOS Calculation

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Flatband voltage calculation(1) If there is no charge present in the oxide or at the oxide-semiconductor interface, the flat band voltage simply equals the difference between the gate metal work function,  M, and the semiconductor work function,  S. (1.3.1) V FB =  M -  S The work function is the voltage required to extract an electron from the Fermi energy to the vacuum level. This voltage is between three and five Volt for most metals. The actual value of the work function of a metal deposited onto silicon dioxide is not exactly the same as that of the metal in vacuum.

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Flatband voltage calculation(2) Table 1.3.1Workfunction of selected metals as measured in vacuum and as obtained from a C-V measurement on an MOS structure. The workfunction of a semiconductor,  S, requires some more thought since the Fermi energy varies with the doping type as well as with the doping concentration. This workfunction equals the sum of the electron affinity in the semiconductor, , the difference between the conduction band energy and the intrinsic energy divided by the electronic charge in addition to the bulk potential. This is expressed by the following equation: (1.3.2) (1.3.2)

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Flatband voltage calculation(3) For MOS structures with a highly doped poly-silicon gate one must also calculate the work function of the gate based on the bulk potential of the poly-silicon. Where N a,poly and N d,poly are the acceptor and donor density of the p-type and n-type poly-silicon gate (1.3.3)

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Flatband voltage calculation(4) For a pMOS capacitor, which has an n-type substrate with doping density N d, the work function difference equals: (1.3.4) The flat band voltage of real MOS structures is further affected by the presence of charge in the oxide or at the oxide-semiconductor interface. The flat band voltage still corresponds to the voltage, which, when applied to the gate electrode, yields a flat energy band in the semiconductor.

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Flatband voltage calculation(5) Any charge in the oxide or at the interface affects the flat band voltage. For a charge, Q i, located at the interface between the oxide and the semiconductor, and a charge density, ρ ox, distributed within the oxide, the flat band voltage is given by: (6.3.5) where the second term is the voltage across the oxide due to the charge at the oxide-semiconductor interface and the third term is due to the charge density in the oxide.

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Flatband voltage calculation(6) The actual calculation of the flat band voltage is further complicated by the fact that charge can move within the oxide. The charge at the oxide-semiconductor interface due to surface states also depends on the position of the Fermi energy. Since any additional charge affects the flat band voltage and thereby the threshold voltage, great care has to be taken during fabrication to avoid the incorporation of charged ions as well as creation of surface states.

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/2006 Example 1.1 Calculate the flat band voltage of a silicon nMOS capacitor with a substrate doping N a = cm -3 and an aluminum gate (  M = 4.1 V). Assume there is no fixed charge in the oxide or at the oxide-silicon interface. Solution The flat band voltage equals the work function difference since there is no charge in the oxide or at the oxide-semiconductor interface. The flat band voltages for nMOS and pMOS capacitors with an aluminum or a poly-silicon gate are listed in the table below.

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Inversion layer charge(1) The basis assumption as needed for the derivation of the MOSFET models is that the inversion layer charge is proportional with the applied voltage. In addition, the inversion layer charge is zero at and below the threshold voltage as described by: (1.3.6) The linear proportionality can be explained by the fact that a gate voltage variation causes a charge variation in the inversion layer. The proportionality constant between the charge and the applied voltage is therefore expected to be the gate oxide capacitance. This assumption also implies that the inversion layer charge is located exactly at the oxide-semiconductor interface.

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Inversion layer charge(2) Because of the energy band gap of the semiconductor separating the electrons from the holes, the electrons can only exist if the p-type semiconductor is first depleted. The voltage at which the electron inversion-layer forms is referred to as the threshold voltage. To justify this assumption we now examine a comparison of a numeric solution with equation (1.3.6) as shown in Figure 1.3.2

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Inversion layer charge(3) Fig Charge density due to electrons in the inversion layer of an MOS capacitor. Compared are the analytic solution (solid line) and equation (1.3.6) (dotted line) for N a = cm -3 and t ox = 20 nm. (1.3.6)

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Full depletion analysis(1) We now derive the MOS parameters at threshold with the aid of Figure To simplify the analysis we make the following assumptions: 1) we assume that we can use the full depletion approximation 2) we assume that the inversion layer charge is zero below the threshold voltage. Beyond the threshold voltage we assume that the inversion layer charge changes linearly with the applied gate voltage

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Full depletion analysis(2) Fig Electrostatic analysis of an MOS structure. Shown are (a) the charge density, (b) the electric field, (c) the potential and (d) the energy band diagram for an nMOS structure biased in depletion.

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Full depletion analysis(3) The derivation starts by examining the charge per unit area in the depletion layer, Q d. As can be seen in Figure (a), this charge is given by: (1.3.7) (1.3.8) Where x d is the depletion layer width and N a is the acceptor density in the substrate. Integration of the charge density then yields the electric field distribution shown in Fig (b). The electric field in the semiconductor at the interface,E s, and the field in the oxide equal, E ox Fig

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Full depletion analysis(4) The electric field changes abruptly at the oxide-semiconductor interface due to the difference in the dielectric constant. At a silicon/SiO 2 interface the field in the oxide is about three times larger since the dielectric constant of the oxide (  ox = 3.9  0 ) is about one third that of silicon (  s = 11.9  0 ). The electric field in the semiconductor changes linearly due to the constant doping density and is zero at the edge of the depletion region, based on the full depletion approximation. Fig

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Full depletion analysis(5) The potential shown in Figure (c) is obtained by integrating the electric field. The potential at the surface,  s, equals: (1.3.9) The calculated field and potential is only valid in depletion. In accumulation, there is no depletion region and the full depletion approximation does not apply Fig

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Full depletion analysis(6) In inversion, there is an additional charge in the inversion layer, Q inv. This charge increases gradually as the gate voltage is increased. However, this charge is only significant once the electron density at the surface exceeds the hole density in the substrate, N a. We therefore define the threshold voltage as the gate voltage for which the electron density at the surface equals N a. This corresponds to the situation where the total potential across the surface equals twice the bulk potential,  F. (1.3.10)

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Full depletion analysis(7) The depletion layer in depletion is therefore restricted to this potential range: (1.3.11) For a surface potential larger than twice the bulk potential, the inversion layer charge increases exponentially with the surface potential. Consequently, an increased gate voltage yields an increased voltage across the oxide while the surface potential remains almost constant. We will therefore assume that the surface potential and the depletion layer width at threshold equal those in inversion. The corresponding expressions for the depletion layer charge at threshold, Q d,T, and the depletion layer width at threshold, x d,T, are: (1.3.12) (1.3.13)

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Full depletion analysis(8) Beyond threshold, the total charge in the semiconductor has to balance the charge on the gate electrode, Q M, or: where we define the charge in the inversion layer as a quantity, which needs to determined but should be consistent with our basic assumption. This leads to the following expression for the gate voltage, V G : In depletion, the inversion layer charge is zero so that the gate voltage becomes: (1.3.14) (1.3.15) (1.3.16)

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/ Full depletion analysis(9) while in inversion this expression becomes: the third term in (1.3.17) states our basic assumption, namely that any change in gate voltage beyond the threshold requires a change of the inversion layer charge. From the second equality in equation (1.3.17), we then obtain the threshold voltage or : (1.3.17) (1.3.18)

Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/2006 Example 1.2 Calculate the threshold voltage of a silicon nMOS capacitor with a substrate doping N a = cm -3, a 20 nm thick oxide (e ox = 3.9 e 0 ) and an aluminum gate (F M = 4.1 V). Assume there is no fixed charge in the oxide or at the oxide-silicon interface. Solution The threshold voltage equals: Where the flatband voltage was already calculated in example 1.1. The threshold voltage voltages for nMOS and pMOS capacitors with an aluminum or a poly-silicon gate are listed in the table below.