CS/ECE 3330 Computer Architecture Kim Hazelwood Fall 2009.

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CS/ECE 3330 Computer Architecture Kim Hazelwood Fall 2009

CS/ECE 3330 – Fall 2009 Computer Architecture IS MY RESEARCH AREA My Background PhD from Harvard in 2004 Post-Doc at Intel Massachusetts Started at UVa in 2005 Consultant for Intel 2005-present Telecommute - 1 day/week On site – once per quarter Other Industry Experience HP Cupertino CA HP Labs Cambridge MA IBM Research NY About Your Instructor 1

CS/ECE 3330 – Fall What will we learn in this course? The “interface” between hardware and software –Good design requires an understanding of both Microprocessor design from a high level – Architecture … not implementation Software from a low level – Assembly, bit manipulation Design considerations, metrics, and evaluation How it all fits together HW SW

CS/ECE 3330 – Fall Course Materials The Book: 4 th Edition Patterson & Hennessy –3 rd edition won’t suffice –CD contains SW we’ll be using Everything is on Collab –The schedule –Problem sets –Lab materials Lectures –Slides on the course website –Attending class is in your best interest

CS/ECE 3330 – Fall 2009 Starts in a couple weeks Ignore locations Ignore enrollment limits Five labs Work in teams of 2 Will have 2 weeks for most labs Can do some of it at home ahead of time Tools PCSpim – MIPS ISA simulator SMOK – Machine organization simulator ALUs, register files, logic gates, … The Lab 4

CS/ECE 3330 – Fall Required Work Three Exams (55%) –Two tests in class (30%) –Tentatively: 9/28 and 11/2 –Cumulative exam (25%) –Sat 2PM Problem Sets (20%) –About 7 assignments Labs (25%) –5 labs

CS/ECE 3330 – Fall 2009 What do you look for when buying a computer? Class Survey 6

CS/ECE 3330 – Fall 2009 Classes of Computers Desktop computers General purpose, variety of software Subject to cost/performance tradeoff Server computers Network based High capacity, performance, reliability Range from small servers to building sized Embedded computers Hidden as components of systems Stringent power/performance/cost constraints

CS/ECE 3330 – Fall 2009 Intel’s 1.6 GHz Atom

CS/ECE 3330 – Fall 2009 How can you make your programs run faster? Class Survey 9

CS/ECE 3330 – Fall 2009 Understanding Performance Algorithm Determines number of operations executed Programming language, compiler, architecture Determine number of machine instructions executed per operation Processor and memory system Determine how fast instructions are executed I/O system (including OS) Determines how fast I/O operations are executed

CS/ECE 3330 – Fall 2009 Moore’s Law But watch out for Gates' Law… How Have We Been Doing? 11

CS/ECE 3330 – Fall Hicham El Guerrouj :43.13 Roger Bannister :59.4 7% Improvement in 45 years By Comparison: The Mile Run

CS/ECE 3330 – Fall 2009 A Successful Endeavor 13

CS/ECE 3330 – Fall 2009 Application software Written in high-level language System software Compiler: translates HLL code to machine code Operating System: service code –Handling input/output –Managing memory and storage –Scheduling tasks & sharing resources Hardware Processor, memory, I/O controllers Below Your Program

CS/ECE 3330 – Fall 2009 Levels of Program Code High-level language Level of abstraction closer to problem domain Provides for productivity and portability Assembly language Textual representation of instructions Hardware representation Binary digits (bits) Encoded instructions and data

CS/ECE 3330 – Fall 2009 Opening the Box

CS/ECE 3330 – Fall 2009 Inside the Processor (CPU) Datapath: performs operations on data Control: sequences datapath, memory,... Cache memory Small fast SRAM memory for immediate access to data

CS/ECE 3330 – Fall 2009 Inside the Processor AMD Barcelona: 4 processor cores

CS/ECE 3330 – Fall inch wafer of AMD Opteron X2 chips Fabbing the Chips 19

CS/ECE 3330 – Fall 2009 How long do you think it takes to design and build a modern processor? Processor Design Cycle 20

CS/ECE 3330 – Fall 2009 “The Multicore Challenge” Power, temperature, and reliability What’s New and Cool in the Field? 21

CS/ECE 3330 – Fall 2009 Heterogeneous systems Special purpose processors on chip, e.g. GPGPUs Many big companies have an architecture team Microsoft Google D.E. Shaw What’s New and Cool in the Field? 22

CS/ECE 3330 – Fall 2009 Performance analysis First problem set is on collab Due one week from today at 2PM Next Time … 23