15th Dec, 2007DAE-SNP07 S.S.Upadhya1 Electronics and Data Acquisition system for prototype INO-ICAL detector A.Behere1, V.B.Chandratre1, S.D.Kalmani2, N.K.Mondal2, P.K.Mukhopadhyay1, B.K.Nagesh2, S.K.Rao2, L.V.Reddy2, M.N.Saraf2, B.Satyanarayana2,R.S.Shastrakar1, R.R.Shinde2, *S.S.Upadhya2 1Electronics Division, BARC, Mumbai ; 2DHEP, TIFR, Mumbai. * Presented by Prof Vivek Datar, NPD, BARC OBJECTIVES: Feasibility study of INO prototype detector ( RPC ) of dimension 1m 3 Fast development of electronics to study the detector performance Outline of Talk:  Introduction  Experimental set up  Front end Analog Electronics  Trigger logic  Software  Present configuration of Electronics setup  Modules developed in-house  Performance and Conclusion

15th Dec, 2007DAE-SNP07 S.S.Upadhya2 INO Prototype Detector Informations to be recorded on every valid trigger:  Event time up to micro secs (RTC)  Particle interaction tracks (X-Y pick-up signal boolean status of each layer)  relative time of interaction along the layers of RPCs (TDCs) Detector Specifications: 14 layers of RPCs RPC has X & Y-planes (orthogonal strips) Each plane gives 32 pick up signals Total no. of channels = 14x2x32 = 896 X=1m Y=1m Z=1m RTC Final Trigger INO controller TDC Readout Mod. Monitor Scaler CAMAC Controller CAMAC back end Front end Electronics DETECTOR RPC 60mm iron Design Considerations: Flexibility and scalability Fast implementation using available resources and expertise Custom design standard at front end and CAMAC standard at back end. BACK

15th Dec, 2007DAE-SNP07 S.S.Upadhya3 Electronics Set up CAMAC system SIGNAL ROUTERS Trigger & TDC Control - Data Monitoring TRIGGER Controller Read out TDC RTC Eve Scalers Mon Scalers CAMAC Controller Amplifier and Discriminator Processing and Monitoring Layer 1 (X&Y) Amplifier and Discriminator Processing and Monitoring Layer 14 (X&Y) Front End Back End Main Sections of the setup: 1. Front End Electronics 2. Trigger logic 3. Event recording 4. Monitoring Daisy chain : interface between Front end and Back end electronics across layers for control, data transfer and monitoring Event daisy chain : 1 each for 14 layers of X & Y planes Monitor daisy chain: 8 no.s ( 1 each for every 4 layers in X & Y planes ) Note: MAX length of a daisy chain can be 16 modules BACK BACK

15th Dec, 2007DAE-SNP07 S.S.Upadhya4 Front end Analog Electronics 8 channel Amplifier : RPCs in avalanche mode gives very small pulses of few mV and hence signal is amplified Specifications : placed close to pick-up strips a gain of ohm output impedance rise time of 2 ns Front End Discriminator: Converts the pickup signals over set threshold to digital signals (Diff ECL) Specifications: 16 channels per module common threshold variable from 2 to 500mV houses Trigger-0 logic also BACK

15th Dec, 2007DAE-SNP07 S.S.Upadhya5 Trigger Logic For X-plane in Front End Discriminator (FED) module [ TRIGGER 0 LOGIC - T0 trigger] Pickup signals crossing set threshold converted to DIGITAL (diff ECL) ; typical rate ~200Hz Every 8 th pickup signals in a plane are logically ORed to get T0 signals (S1 to S8) Sn rate is 4x200= 800Hz in Front End Processing (FEP) module[ TRIGGER 1 LOGIC - T1 trigger] M fold coincidence of S1 to S8 signals (equivalent to M fold coincidence of consecutive pickup signals in a plane) Final Trigger Module ( CAMAC std. ) [ TRIGGER 2 LOGIC - T2 trigger ] M fold signals(1F,2F,3F,4F) from all the X-planes are the inputs (diff LVDS) MxN fold trigger is generated ie N fold coincidence of M fold (T1) triggers from consecutive planes typical MxN folds implemented are 1x5, 2x4, 3x3, 4x2 For Y-plane Similarly MxN fold for Y-plane is generated Final Trigger is logical OR of MxN fold trigger from X and Y-planes Final Trigger invokes DAq system via LAM to record the event information. BACK Eg: M = 1F :: S1+S2+….+S8 M = 2F :: S1.S2 + S2.S3 + S3.S4 + ….. + S7.S8 + S8.S1 M = 3F :: S1.S2.S3 + S2.S3.S4 + S3.S4.S5 + ….. + S7.S8.S1 + S8.S1.S2 M = 4F :: S1.S2.S3.S4 + S2.S3.S4.S5 + ….. + S7.S8.S1.S2 + S8.S1.S2.S3

15th Dec, 2007DAE-SNP07 S.S.Upadhya6 EVENT RECORDING On a final trigger, DAq program records  Event time up to microsecond  TDC readings  Boolean status of all pickup signals  Useful Trigger rates MONITORING On a periodic Monitoring trigger ( 1Hz)  Monitor time recorded up to microsecond  Rates of selected set of channels are recorded  Next set of channels are selected for monitoring DAq. Software DAq. Program has been developed in C under Linux Main program displays Event data, Monitor Data as well as responds for user Key hit services

15th Dec, 2007DAE-SNP07 S.S.Upadhya7 BACK SW & HW initialization Enable LAM Handler Any Key Key Hit Services Execute Services Quit RETURN Read LAM Register Event Flag. Initiate data transfer from front end to Read-out module. Record RTC time, TDC, Event Scaler. Record Read-out module data. Write data to file Monitor Flag. Record RTC time. Record Monitor scalers. Select next set of channels. Clear Monitor scalers Y N N N N Y Y Y STOP LAM Handler DAq. Software Main program Display Event and Monitor Data Program control On LAM

15th Dec, 2007DAE-SNP07 S.S.Upadhya8 Present configuration of Electronics Setup and DAq. System 16 Chnl DISC 32 Chnl FEP EveCom Mon 32 Chnl FEP EveCom Mon 16 Chnl DISC 32 Chnl FEP EveCom Mon 16 Chnl DISC 32 Chnl FEP EveCom Mon 16 Chnl DISC 32 Chnl FEP EveCom Mon Layer 1 signals 32 Chnl FEP EveCom Mon 16 Chnl DISC 32 Chnl FEP EveCom Mon 16 Chnl DISC 32 Chnl FEP EveCom Mon 16 Chnl DISC Layer 2 signals Layer 3 signals Layer 4 signals Layer 1 signals Layer 2 signals Layer 3 signals Layer 4 signals Control and Data Router (CDR) INO Controller INO Readout Module X planeY plane (** Connections CDR & TTR are similar to X plane) Trigger and TDC Router (TTR) Final Trigger Module TDCCAMAC Controller RTC Monitor Scaler CAMAC bus Chain 1 Chain 2 Chain 3 Chain 2 Chain 3 Layer 5 to 8 Layer 9 to 12 Layer 5 to 8 Layer 9 to 12 FTO

15th Dec, 2007DAE-SNP07 S.S.Upadhya9 Electronics and DAq. System RPC Detector Back end Electronics Front End Electronics BACK

15th Dec, 2007DAE-SNP07 S.S.Upadhya10 Modules Developed in-house Processing and Monitoring module: Latches Boolean status of 32 pick up signals on a final trigger Transfers latched data over event daisy chain Select the channels for monitoring Generates M fold trigger –T1 per plane Board has data-ID, event-ID, monitoring-ID one per plane ie total of 28 modules Final Trigger Module: M folds of all X & Y planes are inputs Generates MxN folds and final trigger Final trigger invokes LAM Inputs and outputs of trigger logic are individually mask-able. Counting of all triggers by built-in scalers Boolean status of M fold signals are latched on final trigger for later reading design is FPGA based

15th Dec, 2007DAE-SNP07 S.S.Upadhya11 Control and Data Router: Routes the control signals from controller to processing modules in the daisy chain. Routes latched event data serially and monitor signals from processing modules to back end via daisy chains Trigger and TDC Router: Routes M fold signals from all the processing modules to Final Trigger modules Routes 1F signals from each processing module to TDC module as TDC stops

15th Dec, 2007DAE-SNP07 S.S.Upadhya12 INO Controller: In Event process, SW initiates the Controller to flush data serially from all processing modules over event daisy chains. In Monitoring process, It selects the channels to be monitored. Event and monitoring parameters like event data transfer speed, data size, monitoring period etc. are user programmable via CAMAC interface Diagnostic features for DAq. is supported. Read-out Module: Receives Event data over 2 serial connections and 8 pick-up signals for monitoring from respective chains. Serial Data converted into 16bit parallel data and stored temporarily in FIFOs buffer. program reads FIFO data via CAMAC interface BACK

15th Dec, 2007DAE-SNP07 S.S.Upadhya13 Performance and Conclusion  Most of the relevant modules are fabricated in-house and integrated into the system.  The Electronic set up in conjunction with the prototype detector has been performing satisfactorily.  Serial data transfer is tested upto a baud rate of 1 Mbps.

15th Dec, 2007DAE-SNP07 S.S.Upadhya14 BACK

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15th Dec, 2007DAE-SNP07 S.S.Upadhya16 Electronics and Data Acquisition system for prototype INO-ICAL detector S.S.Upadhya, TIFR ( on behalf of INO collaboration ) OBJECTIVES: Feasibility study of INO prototype detector ( RPC ) of dimension 1m 3 Fast development of electronics to study the detector performance Outline of Talk:  Introduction  Experimental set up  Front end Analog Electronics  Trigger logic  Software  Typical Electronics setup and DAq. System  Modules developed in-house  Performance and Conclusion OBJECTIVES: Feasibility study of INO prototype detector ( RPC ) of dimension 1m 3 Fast development of electronics to study the detector performance Outline of Talk:  Introduction  Experimental set up  Front end Analog Electronics  Trigger logic  Software  Typical Electronics setup and DAq. System  Modules developed in-house  Performance and Conclusion