1 3-General Purpose Processors: Altera Nios II 2 Altera Nios II processor A 32-bit soft core processor from Altera Comes in three cores: Fast, Standard,

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Presentation transcript:

1 3-General Purpose Processors: Altera Nios II

2 Altera Nios II processor A 32-bit soft core processor from Altera Comes in three cores: Fast, Standard, Light The three cores trade FPGA area and power consumption for speed of execution. Is a RISC, Harvard Architecture: Simple instructions, separate data and instruction memories. Has 32 levels of interrupts. Uses the Avalon Bus interface Programs compiled using C/C++ compilers

3 Nios II Architecture

4 Three forms of Nios II: Nios II/f—The Nios II/f “fast” core is designed for fast performance. As a result, this core presents the most configuration options allowing you to fine- tune the processor for performance. Nios II/s—The Nios II/s “standard” core is designed for small size while maintaining performance. Nios II/e—The Nios II/e “economy” core is designed to achieve the smallest possible core size. As a result, this core has a limited feature set, and many settings are not available when the Nios II/e core is selected. All three are available to you !

5 Selection in SOPC:

6 Why use microprocessors? Alternatives: field-programmable gate arrays (FPGAs), custom logic, etc. Microprocessors are often very efficient: can use same logic to perform many different functions. Microprocessors simplify the design of families of products.

7 The performance paradox Microprocessors use much more logic to implement a function than does custom logic. But microprocessors are often at least as fast:  heavily pipelined;  large design teams;  aggressive VLSI technology.

8 Power Custom logic is a clear winner for low power devices. Modern microprocessors offer features to help control power consumption. Software design techniques can help reduce power consumption.

9 Challenges in embedded system design How much hardware do we need?  How big is the CPU? Memory? How do we meet our deadlines?  Faster hardware or cleverer software? How do we minimize power?  Turn off unnecessary logic? How to optimize speed?  Reduce memory accesses?

10 Design methodologies A procedure for designing a system. Understanding your methodology helps you ensure you didn’t skip anything. Compilers, software engineering tools, computer-aided design (CAD) tools, etc., can be used to:  help automate methodology steps;  keep track of the methodology itself. Altera CAD tools: Quartus 2, SOPC, Nios II IDE.

11 Design goals Performance.  Overall speed, deadlines. Functionality and user interface. Manufacturing cost. Power consumption. Other requirements (physical size, etc.)

12 Levels of abstraction requirements specification architecture component design system integration

13 Top-down vs. bottom-up Top-down design:  start from most abstract description;  work to most detailed. Bottom-up design:  work from small components to big system. Real design uses both techniques.

14 Typical CAD design flow:

15 Designing hardware and software components Must spend time architecting the system before you start coding. Some components are ready-made, some can be modified from existing designs, others must be designed from scratch. Example: SOPC for Hardware design and Nios 2 IDE for Software Design.

16 SOPC System on a programmable chip – a hardware development tool. Used for integrating various hardware components together like:  Microprocessors, such as the Nios II processor  Timers  Serial communication interfaces: UART, SPI  General purpose I/O  Digital signal processing (DSP) functions  Communications peripherals  Interfaces to off-chip devices Memory controllers Buses and bridges Application-specific standard products (ASSP) Application-specific integrated circuits (ASIC) Processors Generates files in Verilog or VHDL which can be added to the Quartus 2 project.

17 SOPC builder tool

18 Example SOPC system:

19 SOPC system having NIOS:

20 Examples of a sophisticated embedded systems: Bridging multiple network protocols to provide hardware interoperability. Uses network of Radars to increase the warning time for tornadoes, flash floods, and other severe weather disturbances. Uses data acquisition systems which gather information from Radars- Embedded Device, which collect data and relay it over a network. Others…