In-Beam PET Status Report -- TPS

2 TPS project PET monitoring prototype 2D view of the FOV coverage of the 4+4 modules Use of 4 modules vs. 4 modules of LYSO + H8500 Matrix size: 23 x 23 pixels 1.9 mm side, on a 2.0 mm pitch Thickness: 18 mm. 10 cm

Ongoing development toward the final DAQ Plug’n’PET single 1 vs. 1 module Fully working listmode format DoPET compatible Plug’n’PET dual 2 vs. 2 modules Fully working New listmode format 9vs.9 expandable Fully digital timing logic option Plug’n’PET Up to 9 vs. 9 modules Development stage Fully digital timing logic option Superior count rate and timing performance

4 Fast prototyping and test system “plug’n’PET” Coincidence board FPGA/USB board 2 DAQ boards I/O power board

Ongoing development toward the final DAQ Plug’n’PET single 1 vs. 1 module Fully working listmode format DoPET compatible Plug’n’PET dual 2 vs. 2 modules Fully working New listmode format 9vs.9 expandable Fully digital coincidence logic option Plug’n’PET Up to 9 vs. 9 modules Development stage Fully digital timing logic option Superior count rate and timing performance

New: Plug’n’PET dual 6 4 DAQ boards I/O power board Can handle up to 2 vs. 2 modules. A new FPGA based fully digital coincidence logic is implemented Acquisition and analysis software will be compatible with the final version

Acquisition software: GUI Main window Configuration window Acquisition window

Analysis Software Completely renewed with the plug’n’PET dual First version completed and tested Produces planograms for 3D reconstruction Image reconstruction software development is still in progress

Ongoing development toward the final DAQ Plug’n’PET single 1 vs. 1 module Fully working listmode format DoPET compatible Plug’n’PET dual 2 vs. 2 modules Fully working New listmode format 9vs.9 expandable Fully digital timing logic option Plug’n’PET Up to 9 vs. 9 modules Development stage Fully digital timing logic option Superior count rate and timing performance

Final DAQ system Can handle up to 9 vs. 9 modules. High performance FPGA FPGA based fully digital coincidence logic will be implemented Still at the development stage

PMT 4B DAQ 4B DAQ 4A 11 Acquisition system architecture PMT 4A DAQ 3A Host PC USB Controller Master FPGA DAQ 2A Anger-like signals Timing signals coincidence triggers MAINBOARD Timing signals DAQ 1A PMT 3A PMT 2A PMT 1A DAQ 3B DAQ 2B Anger-like signals DAQ 1B PMT 3B PMT 2B PMT 1B CFD LYSO1A LYSO2A LYSO3A LYSO4A LYSO1B LYSO2B LYSO3B LYSO4B

PMT 4B DAQ 4B DAQ 4A 12 Acquisition system architecture PMT 4A DAQ 3A Host PC USB Controller Master FPGA DAQ 2A Anger-like signals Timing signals coincidence triggers MAINBOARD Timing signals DAQ 1A PMT 3A PMT 2A PMT 1A DAQ 3B DAQ 2B Anger-like signals DAQ 1B PMT 3B PMT 2B PMT 1B CFD LYSO1A LYSO2A LYSO3A LYSO4A LYSO1B LYSO2B LYSO3B LYSO4B

13 Possible expansion (9 vs. 9 modules) This would allow about 2x in sensitivity wrt 4 vs. 4

14 Mechanical construction of the detector heads Detector head (inside) Detector head (outside) Single module

Roadmap Software Acquisition software for the plug’n’PET dual Revision of the listmode formatAnalysis softwarePlanogram generation Image reconstruction (facing modules) Fully 3D image reconstruction Hardware Development of the Plug’n’PET dual board Construction of the Plug’n’PET motherboard Revision of the Plug’n’PET motherboard Testing of the motherboard Simulation of the analogue circuitry for timing and energy measurement optimization Development of the motherboard firmware System assembling with new components