+ CS 325: CS Hardware and Software Organization and Architecture Combinational Circuits 1

+ Outline Combinational Logic Classifications 1 Bit Binary Half-Adder Binary Full-Adder 4 Bit Binary Adder N-Bit Binary Adder Binary Subtractor Binary Decoder 2 Bit ALU

+ Combinational Logic Combinational Logic Circuits Made using basic logic gates: AND, OR, NOT, NAND, etc. that are connected together to produce more complex circuits. Output is determined by the logical function of their input state at any given instant in time. Three main ways of specifying the function of a combinational logic circuit: Boolean Algebra Expression Truth Table Logic Diagram

+ Combinational Logic Translates a set of Boolean N input variables (0, 1) by mapping a function to produce a set of Boolean M output variables (0,1).

+ Combinational Logic Since combinational logic circuits are made up from individual logic gates, they can be considered as “decision making circuits”.

+ Classification of Combinational Logic Combinational Logic Circuit Arithmetic & Logical Functions Adders Subtractors Comparitors Data Transmission Multiplexers Demultiplexers Encoders Decoders Code Converters Binary BCD 7-segment

+ 1-bit Binary Half-Adder Uses AND and XOR gates. “adds” two single bit binary number to produce two outputs: Sum and Carry ABSumCarry

+ Binary Full Adder w/ Carry-In Uses AND, OR, and XOR gates. Basically two half-adders connected together. Three inputs: A, B, and Carry-In Two outputs: Sum and Carry-out ABC-inSumC-out

+ Binary Full Adder w/ Carry-In Can be represented in block notation:

+ 4-bit Binary Adder Simply 4 full adders cascaded together. Each full adder represents a single weighted column. Carry signals connected producing a “ripple” effect from left to right. Also called the “Ripple Carry Binary Adder”.

+ 4-bit Binary Adder Example: A: 1010 B:0011 We want to add A and B using the 4-bit Binary Adder.

+ N-bit Binary Adder Cascading Full adders can be used to accommodate N-bit Binary numbers. Problems with the N-bit Binary Adder?

+ N-bit Binary Adder Problems First problem: Remember, Combinational circuits have no “memory”, or feed back state. Output is completely dependent on the current state of input(s) If there is a change in any of the inputs to the Adder, the sum at its output is not valid until any carry-in has “rippled” through every adder in the chain. Second problem: There is a delay before the output responds to a change in any of the inputs. This unwanted delay is called Propagation delay. Propagation delay of N-bit Adders is directly proportional to the number of 1-bit adders in its chain. Third problem: Overflow can occur. This happens when an N-bit adder adds two numbers whose sum is >= 2 n.

+ 4-bit Binary Subtractor Since we know how to add two 4-bit binary numbers, how can we go about subtracting them? Example: A - B Special subtraction combinational circuits? Not needed! We can convert B to it’s 2’s compliment equivalent and still use our 4-bit binary adder. This can be achieved by using a NOT gate on each input of B. To complete 2’s compliment, we’ll need to set the first carry-in to “1”, which will add 1 to the 1’s compliment notation of B.

+ 4-bit Binary Subtractor Example: A: 0111 B:0010 We want to subtract B from A using the modified 4-bit Binary Adder.

+ Binary Decoder Used to translate coded information from one format to another. Each unique combination of inputs creates a logical “1” in a specific output. Binary decoders have inputs, N, of 2-bits, 3-bits, or 4- bits. Output, M, is maximum 2 N. We can then say that a standard combinational Binary decoder is an N-to-M decoder, where M<=2 N. Output, Q, is completely dependent on the states of the inputs to the decoder. Practical Binary decoder circuits include the following configurations: 2-to-4 3-to-8 4-to-16

+ Binary Decoder – Simple Example The simplest example of a Binary decoder is the NOT gate. The NOT gate can be shown as a 1-to-2 Binary decoder. AQ0Q0 Q1Q

+ 2-to-4 Binary Decoder The following is an example of a 2-input, 4-output Binary Decoder. The inputs, A and B, determine which output, Q 0 to Q 3, is “high” while the remaining outputs are “low”. Only one output can be active at any given time. ABQ0Q0 Q1Q1 Q2Q2 Q3Q

+ 3-to-8 Binary Decoder Binary Decoders can also be represented by block notation: ABCQ0Q1Q2Q3Q4Q5Q6Q

+ Simple Arithmetic Logic Unit (ALU) Arithmetic circuit: 2 Bit ALU Can compute: A And B, A Or B, B, A + B (addition) 2 inputs A, B, and 2 control inputs F0, F1 to select one of the functions above.

+ Simple Arithmetic Logic Unit (ALU)