OPA549 and Negative Whisker on Enable Tim Green, MGTS Precision Linear Analog Applications July 27, 2015

Customer Circuit

Customer Problem

Customer Problem When 9-pin(E/S) are made Low⇒High and OPA549 output is done in Disable⇒Enable, the negative voltage whisker is output. ※Waveform is attached below Please let me know about below. ・When OPA549 is Disable, is the internal circuit down which -15V is flowing here?   ⇒When there is information of internal circuit, please give me. ・Is there a measure?   【Additional information】 ・Supply voltage:±15V ・When -VS is changed to GND from -15V, it becomes good. （No whisker） ・Control of E/S is High/Low signal of MCU into buffer IC.    ⇒The amplitude of whisker is depend on off/on timing.  　（Max:0.6uS width/ -5V.） ・Even if a loop of OPAMP is cut off, it occurs. ・The customer request, the negative output is bad. ～Customer Information is below～ What is end Application 　　　　　⇒Portable healthcare What is subsystem part is used on?                ⇒±15V current output AMP Part input signals: amplitude Part output load: dynamic Power supply:LDO

TINA Loop Stability Analysis

TINA Loop Stability Analysis

Feedback Current

Vo_IA Feedback Current (see speaker notes) On a 5V supply the positive swing to rail on the output at 100uA is about Vcc - 1.65V worst case at -40C. That means 3.35V out if the 5V supply stays at 5V minimum. These plots are usually for saturation voltage. I do not exactly know the Inst Amp characteristics but from a design margin view I would allow another 200mV of headroom at 100uA output to guarantee linear operation. In that case you want 3.3V + 1.65 +0.2 = 5.15V supply. Recommend to run Inst Amp from +15V, -5V.

OPA549 E/S Pin Comments OPA549 E/S pin: When E/S = 0V part is going into output high impedance. Internal bias circuitry for the output stage is being disabled. 2) The design of the output stage of OPA549 is all NPN. This means that the negative swing devices on the output are NPN transistors. The negative swing Circuitry has an additional circuit with local feedback around it to make the NPN Transistor look like a PNP transistor. Because of this local feedback I would Suspect that coming out of shutdown you would be most likely to see a negative glitch since there is an inner loop that must settle . 3) When using E/S pin there is no way to predict the “Whisker” or glitch when you turn back on the bias circuitry for the output stage. Whatever you see on one part may be different on another part made on a different day. Or may also be different over temperature changes. 4) E/S pin of OPA549 is not designed or guaranteed to be glitch free coming out of or going into shutdown. 5) If you need glitch free turn-on turn-off with E/S pin on OPA549 consider an external switch to short out load until E/S is totally into the on mode.

Recommended supply changes for Vo_IA headroom and “minimal” glitch on OPA549 output

Op Amp Stability Reference For detailed, definition-by-example of 10 different ways to stabilize op amps driving capacitive loads, and additional technical information on solving op amp stability problems, visit the Texas Instruments E2E Forum at: http://e2e.ti.com/support/amplifiers/precision_amplifiers/w/design_notes/2645.solving-op-amp-stability-issues.aspx Download Part 1, Part 2, Part 3, and Part 4. All Embedded Schematics in this presentation can be run in the Free TINA_TI SPICE simulator available at: http://www.ti.com/tool/tina-ti