1. Avoid Electrical Overstress (EOS) Op Amps during Power Cycling
Tim Green
Senior Analog Applications Engineer
Precision Analog Linear Applications

2. Complete External EOS Protection
Illustrated here is a complete EOS protection scheme using external protection devices. If one knows the internal ESD cells used on each op amp pins some of these external devices can be eliminated as long as the internal devices can adequately protect the respective op amp pin. The SDIx Schottky diodes provide voltage clamps for input overvoltages. Current through these diodes must be limited to the specified level for the diode used. The SDOx Schottky diodes provide voltage clamp protection for output overvoltages. If this output protection is used on power op amps Power Schottky diodes need to be used. Current through these diodes must be limited to the specified level for the diode used. Once transient overvoltages are routed through input or output diodes the energy must be clamped to ground or the op amp will be overvoltaged and can become latched or damaged permanently. If the power supply does not look like a low impedance for the frequency of the energy dumped into it through the diodes then we need to have zener diodes or unidirectional semiconductor transient voltage suppressors on each supply to dump this energy to ground. Since most power supplies only drive current one direction zener diodes or unidirectional semiconductor transient voltage suppressors offer a simple, low cost way to provide a current path the opposite direction.

3. EOS Iq Protection using Zeners or Unipolar Semiconductor Transient Voltage Suppressors
Power supplies which do not come up at the same time can create problems for op amps. Open or high impedance power supplies can force Iq in an op amp to seek an alternate path than it was designed for. Often this alternate path will be found through the back-biasing and “zenering” of junctions which are not supposed to normally be operated in this region. Once this happens the part can stay latched in this state when the other supply comes up. This can lead to destruction of the part. Most power supplies cannot both source and sink current and look like opens or high impedance on power-up. A positive linear regulator or LDO for instance can only source current and not sink current. To guarantee there is a proper path for Iq on power-up it is highly recommended that zener diodes or unidirectional semiconductor transient voltage suppressors are added to each power supply. This will allow for a proper path for Iq to flow regardless of power supply sequencing.

4. OPA364 Internal ESD Structures
The most effective way to protect an op amp from EOS for a given application is to know what the internal ESD cells look like on each pin of the op amp being used. Here we show the complete equivalent schematic for the internal ESD structures of an OPA364. Not all op amps use the same ESD cells on their pins. The exact internal ESD cells used for a given op amp are right now only available form the factory. The OPA364 is an example of a typical single supply CMOS op amp. Notice that, especially for CMOS, it often takes more than one internal structure to protect the internal CMOS devices from damage. The +input and –input clamp ESD voltages first with a 15V SCR. After that diodes to each supply rail help clamp any residual voltage that gets through the SCR. The power supply has an active rail to rail clamp which will turn on and short the supplies together for a fast edge usually caused by an ESD discharge. The output also uses a 15V SCR on the output to clamp ESD events. After the SCR there are diodes to each supply rail.
If the OPA364 is powered up and an external real world voltage fast spike occurs on the output with sufficient current (about 100mA) it will trigger the SCR before it can be shunted through the diode DO1 to the V+ supply. Once triggered the SCR will stay triggered if the OPA364 is powered and the output is trying to be driven high. The OPA364 output is capable of driving 100mA and it will drive it through the SCR to ground. The OPA364 will stay latched like this until power is cycled to release the SCR. It is important in real world applications to ensure ESD cells are not triggered when the circuit is powered up or latch-up can occur.