By Tariq Bashir Ahmad Taylor Expansion Diagrams (TED) Adapted from the paper M. Ciesielski, P. Kalla, Z. Zeng, B. Rouzeyre,”Taylor Expansion Diagrams: A Compact Canonical Representation for Symbolic Verification”, in DATE, 2002.

ECE 697B Spring Presentation Structure Motivation – RTL verification Background BDD (binary), BMD (word-level) New canonical representation: TED Construction and manipulation Properties Applications

ECE 697B Spring Motivation – RTL Verification Complex RTL designs Data flow and control Arithmetic and Boolean B A s 1010 F D akak bkbk > + * - B A s 0101 F D akak bkbk <= + * - Equivalence verification –Need representation that can handle arithmetic/Boolean Efficient, compact Canonical

ECE 697B Spring Levels of Abstraction A[1:0], B[1:0],C[3:0] C = A1B1*2 2 +A1B0*2 +A0B1*2 +A0B0 A[n:0], B[n:0],C[2n:0] C = A*B F (*) A B C We can design at a higher level of abstraction, Can we verify at a higher level of abstraction ?

ECE 697B Spring Boolean functions ( f : B  B ) Truth table, Karnaugh map SoP, PoS etc. Binary Decision diagrams (BDD) Arithmetic functions ( f : B  Int ) Binary Moment Diagrams (BMD) Need more abstract representation for arithmetic functions (f : Int  Int ) Common Representations

ECE 697B Spring Based on recursive Shannon expansion: f = x f x + x’ f x’ where:f x = f(x=1), f x’ =f(x=0) Compact data structure for Boolean logic Canonical representation reduced ordered BDDs (ROBDD) Essential for verification equivalence checking, satisfiability (SAT) fxfx f x’ f x Binary Decision Diagrams ( BDD )

ECE 697B Spring Canonicity: equivalence checking of logic circuits 10 a b c F = a’bc + abc +ab’c G = (a+b)c 10 a b c  Limitations –Require bit-level expansion of word-level variables –Size explosion for some functions (arithmetic) Application to Verification

ECE 697B Spring Devised for word-level, arithmetic operations Based on modified Shannon expansion (pos. Davio) f = x f x + x’ f x’ = x f x + (1-x) f x’ = f x’ + x (f x - f x’ ) = f x’ + x f  x where f x’ = f x=0 is zero moment f  x = (f x - f x’ ) is first moment (derivative) Binary Moment Diagrams (BMD)

ECE 697B Spring Efficiently models word-level operators x0 x1 x y0 y1 y2 2 1 X Y =X 2 x 1 x 0. y 2 y 1 y 0 = = 15 X + Y =X 2 x 1 x 0 + y 2 y 1 y 0 = = x0 x1 x2 y0 y1 y Limitation: requires bit-level representation of a word BMD Example

ECE 697B Spring Why expand words into bits? Can we do better? Abstract words into symbolic variables Word level x0 x1 x y0 y1 y2 2 1 X + Y 1 0 X Y Symbolic X Y 1 0 X Y Symbolic 1 0 x0 x1 x2 y0 y1 y Word level Symbolic Representation

ECE 697B Spring x F 0 (x) F 1 (x) F 2 (x) … F(x) F(x) = F 0 (x) + x F 1 (x) + x 2 F 2 (x) + … Taylor Expansion Diagram(TED) F = arithmetic function (F : Int  Int ) Treat F as a continuous function Taylor Expansion (around x=0): F(x) = F(0) + x F’(0) + ½ x 2 F’’(0) + … Notation F 0 (x) = F(x=0) 0-child F 1 (x) = F’(x=0) 1-child F 2 (x) = ½ F’’(x=0) 2-child ====== … So

ECE 697B Spring F = A 2 B + 2C + 3 with order A<B<C A F 0 (A) = F | A=0 = 2C + 3 F 1 (A) = F’ | A=0 = 2AB | A=0 = 0 F 2 (A) = ½ F’’ | A=0 = B B 1 A G= 2C B 0 = B(0) = 0 B 1 =B’ = 1 C G 0 (C) = (2C+3) | C=0 = 3 G 1 (C) = (2C+3)’ = 2 C 2 3 B B (without normalization) Construction of TED example

ECE 697B Spring Few more examples (A+B)C B C A 1 (A+B)(A+2C) 1 0 B C A B 1 2

ECE 697B Spring a b 0 f g b g 1.Eliminate redundant nodes: Nodes with all edges  0 Nodes with only constant term A B C B B C C A B C Merge isomorphic subgraphs (A 2 + 5A + 6)(B + C) f = 0 a a + g(b) = g(b) TED Reduction Rules

ECE 697B Spring TED can be normalized weights of edges of a given node must be relatively prime (to allow sharing isomorphic graphs) 2 6 B A 2 2A + 2B B A B A (A + B + 3) TED Normalization

ECE 697B Spring Operation depends on relative order of variables x, y if x = y, then z = x, and h(x) = f(x) OP g(x) = f 0 (x) OP g 0 (y) + x [f 1 (x) OP g 1 (y)] + x 2 [f 2 (x) OP g 2 ], … if x > y, then z = x, and h(x) = f 0 (x) OP g(y) + x [f 1 (x) OP g(y)] + x 2 [f 2 (x) OP g], … else …. u f x v g y OP = Recursive composition of nodes, starting at the top h = f OP g q z OP = (+, -, ) TED Composition

ECE 697B Spring Nodes indexed by same variable Nodes indexed by different variable (x > y) u u0u0 u1u1 x v v0v0 v1v1 x + = u u0u0 u1u1 x v v0v0 v1v1 y + = u + v u 0 +v 0 u 1 +v 1 x u + v u 0 + v x u1u1 COMPOSE Operator – ADD/SUB

ECE 697B Spring Compose Operation Example 2A+B+2C C A B = A 0+5 B C 1+1 A+B A B C A+2C A 2

ECE 697B Spring PropertyBDDTED DecompositionShannonTaylor CompositionAnd/ORMultiply/Add Canonicity Yes Reduction rulesReduction rules + normalization SatisfiabilityYesNo Comparison of BDD and TED

ECE 697B Spring TED for Arithmetic Circuits Arithmetic circuits contain related word-level (A, B) and Boolean (a k, b k ) variables A = [ a n-1, …, a k, …,a 0 ] = 2 (k+1) A hi + 2 k a k + A lo B A s1s F1F1 D akak bkbk > + * - s 1 = a k (1-b k ) A hi A lo 0 1 2k2k 2 (k+1) AhiAhi akak A lo

ECE 697B Spring Application to RTL Verification Equivalence checking with TEDs interacting word-level and Boolean variables A B s2s F2F2 bkbk akak * * - D B A s1s F1F1 D akak bkbk > + * - F 1 = s 1 (A+B)(A-B) + (1-s 1 )D s 1 = (a k > b k ) = a k (1-b k ) F 2 = (1-s 2 ) (A 2 -B 2 ) + s 2 D s 2 = a k ’  b k = 1 - a k + a k b k A = [A hi,a k,A lo ], B = [B hi,b k,B lo ]

ECE 697B Spring Result: RTL Verification Related word-level and Boolean variables F 1 = s 1 (A+B)(A-B) + (1-s 1 )D s 1 = (a k > b k ) = a k (1-b k ) F 1 = (a k -a k b k ){ (2 k+1 A hi + 2 k a k +A lo ) 2 - (2 k+1 B hi + 2 k b k + B lo ) 2 } + (1–a k + a k b k ) D 1 akak 1 A hi D akak bkbk bkbk B hi A lo B lo k+2 2 k+2 -2 k+2 2k2k -2 2k+2 F 1 = F 2 A lo 2k2k 2 k+1 0

ECE 697B Spring Questions?