J. Michael Moore Computer Processing CSCE 110

J. Michael Moore ProcessorInputOutput Memory Storage

J. Michael Moore Processor a.k.a. Central Processing Unit (CPU) ______________ unit (ALU) __________________ unit performs operations on data (e.g. addition, multiplication) special memory cells that hold data used by ALU and are even faster than cache figures out what the ALU should do next transfers data between main memory and registers

J. Michael Moore Processing Bits Boolean Logic Applied to circuits

J. Michael Moore Logical AND Truth table XYX AND Y False TrueFalse TrueFalse True Logic gate Truth table XYX AND Y

J. Michael Moore Logical AND: An Example TTFFTF ANDFTFTTF FTFFTF

J. Michael Moore Logical OR Truth table XYX OR Y False True FalseTrue Truth table XYX OR Y Logic gate

J. Michael Moore Logical OR: An Example TTFFTF ORFTFTTF TTFTTF

J. Michael Moore Logical NOT Truth table XNot X FalseTrue False Logic gate Truth table XNot X 01 10

J. Michael Moore Logical NOT: An Example TTFFTF NOTFFTTFT

J. Michael Moore Logical NAND Truth table XYX AND YX NAND Y False True FalseTrueFalseTrue False True False Logic gate Truth table XYX AND YX NAND Y

J. Michael Moore Logical NAND: An Example TTFFTF ANDFTFTTF FTFFTF NANDTFTTFT

J. Michael Moore Logic gate Logical NOR Truth table XYX OR YX NOR Y False True FalseTrue False TrueFalseTrueFalse True False Truth table XYX OR YX NOR Y

J. Michael Moore Logical NOR: An Example TTFFTF ORFTFTTF TTFTTF NORFFTFFT

J. Michael Moore Logical Exclusive OR (XOR) Truth table XYX XOR Y False True FalseTrue False Logic gate Truth table XYX XOR Y

J. Michael Moore Logical XOR: An Example TTFFTF XORFTFTTF TFFTFF

J. Michael Moore Adder Half Adder Full Adder Ripple Carry Adder

J. Michael Moore ProcessorInputOutput Memory Storage

J. Michael Moore Ex: to add the number held in address 3 and the number held in address 6 and put the result in address 10, the control unit –copies data in main memory address 3 into register 1 LOAD 3, 1 –copies data in main memory address 6 into register 4 LOAD 6, 4 –tells ALU to add contents of registers 1 and 4 and put the result in register 3 ADD 1, 4, 3 –copies data in register 3 into main memory address 10 STORE 3, 10 How a Program is Executed

J. Michael Moore How a Program is Executed LOAD, ADD, and STORE are machine instructions –___________: what action to do (e.g. ADD) –___________: what is affected (e.g. register 3) How does the control unit know which instruction is next? –The Program

J. Michael Moore How a Program is Stored Program: list of machine instructions using some agreed upon coding conventions. For example: first bytesecond byte instruction third ______ second ______ first ______ _______ code

J. Michael Moore How a Program is Stored Suppose the ________ for ADD is 0010 Then ADD 1, 4, 3 would be encoded as: first bytesecond byte instruction third ______ second ______ first ______ _______ code Program is stored the same way data is stored.

J. Michael Moore How a Program is Executed The control unit has –____________________________________: holds current instruction to be executed –____________________________________: holds address of next instruction in the program to be fetched from memory

J. Michael Moore How a Program is Executed Program counter tells where the computer is in the program. Usually, the next instruction to execute is the next instruction in memory. Sometimes we want to jump to another instruction (e.g., an ‘if’ statement or ‘while’ loop). More instructions: –unconditional JUMP: always jump to the address given –conditional JUMP: only jump if a certain condition is true (e.g., some register equals 0 or two registers equal each other) –Instruction to stop executing instructions: HALT

J. Michael Moore Machine Cycle _____ next instruction, as indicated by the program counter (PC), and increment the PC _____ the bit pattern in the instruction register (IR) - figure out which circuitry needs to be activated to perform the specified instruction _____ the specified instruction, by activating the ALU to do the right thing. If a JUMP, this may cause the PC to be altered Typical speeds: 10 to 100 million instructions per second (MIPS)

J. Michael Moore Architecture CPU Control UnitALU R4 R3 R2 R1 IR PC BUS Memory First Instruction Second Instruction Third Instruction Data

J. Michael Moore PC: IR: R4: R3: R2: R1: Memory: : LOAD 108, : LOAD 109, : ADD 3, 4, : STORE 1, : HALT : 109: 110: Assembly Language Example LOAD LOADADDSTOREHALT