1. Cis303a_chapt04.ppt Chapter 4 Processor Technology and Architecture Internal Components CPU Operation (internal components) Control Unit Move data and instructions between main memory and registers Arithmetic Logic Unit (ALU) Performs computations and comparisons Registers Hold inputs and outputs from the ALU External Components System Bus Transfer between CPU and external components Primary storage (memory) Secondary Storage Hard disk I/O Units Floppy disk, CD, DVD, monitor, printer, mouse, keyboard, speakers etc.

2. Cis303a_chapt04.ppt CPU Control Unit ALU GP Registers AR IR Primary Storage (memory) Secondary Storage (Hard disk) I/O Units (printer, mouse, keyboard) I/O Units (monitor, CD, DVD, scanner) I/O Units (modem, joystick, PDA)

3. Cis303a_chapt04.ppt Clock Pulses: Metrically equal time frames (MHz) x 0 0 x 0 x x 0 0 x x 0 0 x x Fetch Cycle Execution Cycle Fetch Cycle Generally the same amount of clock pulses Execution Cycle Clock pulse times differ dependent upon The instruction to be executed Data How much Location * Note the breaks in the clock pulse between Fetch and Execution

4. Cis303a_chapt04.ppt Computer Cycles Control Unit: Fetch Address of next instruction placed in Address Register Interrogates Address Register Retrieves instruction from memory location pointed to by Address Register Places instruction in Instruction Register Increments Address Register by the length of the retrieved instruction Interrogates Instruction Register (sets up circuitry [AND and OR gates etc.] to process the data) Retrieves data or data address and places in General Purpose register(s) Execution Acts upon the instruction Operation Code (OP Code) in the Instruction Register (sets up circuitry [AND and OR gates etc.] to process the data) Process the instruction and data Place results in GP Registers Return control to Control Unit Control Unit: Complete processing of instruction Store data or address pointers Return to Fetch

5. Cis303a_chapt04.ppt Instructions and Instruction Sets Instruction A command to the CPU to perform one of its primitive processing functions on specific data Directs the CPU as to how to set up the electrical signals to process the data (AND/OR gates etc.) Op Code (Operation Code) The specific instruction operation command Operands Contain the data, memory location, or register number of the information which is to be acted upon Instruction Set The collection of instruction that a CPU can process Ex. VB vs. VBScript in browsers

6. Cis303a_chapt04.ppt MOVE instructions Copy data to/from memory or registers or any combination Load Move (copy) data from Primary Storage into a register Store Move (copy) data from a register to Primary Storage I/O Devices Load/Store data into specific address reanges in Primary Storage This area is the “buffer” for the particular I/O device This area is secure for that particular I/O device only The area is controlled by the CPU and the particular I/O device driver

7. Cis303a_chapt04.ppt NOT (boolean) The result is reversed A positive outcome if the result has a FALSE condition Negative logic Truth Table Input NOT 0 = 1 outcome Input NOT 1 = 0 outcome NOT 0 = 1 NOT 1 = 0 Example: Given: The light in the room is off. Positive: Is the light on? No = False = 0 Negative: Is the light NOT on? Yes it is not on = True = 1 Data Transformations

8. Cis303a_chapt04.ppt Data Transformations AND (boolean) All inputs must be true for a true (1) outcome Positive logic Truth Table All inputs 0 = 0 outcome Any input a 0 = 0 outcome All inputs a 1 = 1 outcome 0 AND 0 = 0 1 AND 0 = 0 0 AND 1 = 0 1 AND 1 = 1 Example: Given: The light in the room is off. Room temperature is 45 degrees. Is the light is on and it is 80 degrees? No = False = 0 Both false Is the light off and it is 85 degrees? No = False = 0 One true AND one false Is the light off and it is below 50 degrees? Yes = True = 1 Both true

9. Cis303a_chapt04.ppt OR (boolean) ANY input must be true for a true (1) outcome Positive logic Truth Table All inputs 0 = 0 outcome Any input a 1 = 1 outcome All inputs a 1 = 1 outcome 0 OR 0 = 0 1 OR 0 = 1 0 OR 1 = 1 1 OR 1 = 1 Example: Given: The light in the room is off. Room temperature is 45 degrees. Is the light is on and it is 80 degrees? No = False = 0 Both false Is the light off and it is 85 degrees? Yes = True = 1 One is true, one is false Is the light off and it is below 50 degrees? Yes = True = 1 Both true Data Transformations

10. Cis303a_chapt04.ppt XOR – Exclusive OR (boolean) Only one true input to generate a true outcome Both true (1) or both false (0) will generate a false (0) outcome Truth Table 0 XOR 0 = 0 1 XOR 0 = 1 0 XOR 1 = 1 1 XOR 1 = 0 Example: Used for 2’s compliment The binary number: 10001011 XOR 11111111 Compliment 01110110 Data Transformations

11. Cis303a_chapt04.ppt ADD Addition of two bit strings Truth Table 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 0 and a 1 carry Example: page 117 139 10 + 15 10 = 154 10 139 10 1 0 0 0 1 0 1 1 + 15 10 1 1 1 1 154 10 1 0 0 1 1 0 1 0 -117 10 1 1 1 0 1 0 1 117 10 + 15 10 0 0 0 1 0 1 0 117 10 compliment 1 add one 0 0 0 1 0 1 1 2s compliment for 117 10 1 1 1 1 add 15 10 0 0 1 1 0 1 0 answer 1 1 0 0 1 0 1 answer compliment 1 2s compliment for answer 1 1 0 0 1 1 0 -102 10 Data Transformations Because the answer should be negative

12. Cis303a_chapt04.ppt SHIFT Bits may be shifted left or right A second operand holds the number of positions to High/low order bit overflow lost Used to extract a single bit Data Transformations

13. Cis303a_chapt04.ppt Branch instructions Cause the processor to depart from sequential instruction order Unconditional Branch The processor is forced to following the new address path Conditional Branch The address path taken by the processor is dependent upon the outcome of a logic decision (condition) outcome HALT Branch Suspends operation or address flow of the current program. In effect terminates the program. Sample page 122 of book Sequence Control

14. Cis303a_chapt04.ppt Template of instruction syntax Formats vary among CPUs Even with the same manufacturer Op Codes Op Code values Op Code sizes Data types Page 125 of book Instruction Length Determined by OP Code Fixed All instructions are same length Padding may be necessary Address register updated by length of instruction Instruction Format

15. Cis303a_chapt04.ppt Less complex instructions in instruction set Must execute a greater number of simple instructions Fixed length instructions Short instruction length More General Purpose Registers Requires more memory as more instructions are required for the same result Reduced Instruction Set Computing (RISC) Complex Instruction Set Computing (CISC) Complex instructions in instruction set Must execute a greater number of simple instructions Fixed and variable length instructions Variable instruction length Fewer General Purpose Registers The instruction set becomes cumbersome Increased fetch and decoding time

16. Cis303a_chapt04.ppt The computer system is synchronized with the clock A steady pulse Megahertz (MHz) – millions of cycles per second Gigahertz (GHz) – billions of cycles per second CPUs are measured for speed using their instruction set MIPS: Millions of Instructions Per Second MFLOPS: Millions of Floating Point Operations per Second Clock Rate

17. Cis303a_chapt04.ppt Hold data or addresses needed by a program Store information for executing program and system status System Registers Not accessible by programs System usage Instruction Register Decode instruction Instruction Pointer Location of current then next instruction Program Status Word (PSW) Status of the CPU Status of executing program FLAGS: bits representing data or statuses Program Registers General Purpose Registers Hold Addresses, data, results CPU Registers

18. Cis303a_chapt04.ppt Switches and Gates Electrical circuits AND, OR, XOR, NOT, NAND The Physical CPU (139)

19. Cis303a_chapt04.ppt Hold data or addresses needed by a program Store information for executing program and system status System Registers Not accessible by programs System usage Instruction Register Decode instruction Instruction Pointer Location of current then next instruction Program Status Word (PSW) Status of the CPU Status of executing program FLAGS: bits representing data or statuses Program Registers General Purpose Registers Hold Addresses, data, results CPU Registers Byte/Word Byte: the number of bits required to make 1 character Word: the basic amount of bits a CPU handles at one time