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Computer Processing CSCE 110 J. Michael Moore.

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Presentation on theme: "Computer Processing CSCE 110 J. Michael Moore."— Presentation transcript:

1 Computer Processing CSCE 110 J. Michael Moore

2 Memory Input Processor Output Storage J. Michael Moore

3 a.k.a. Central Processing Unit (CPU)
arithmetic/logic unit (ALU) registers control unit Processor figures out what the ALU should do next transfers data between main memory and registers special memory cells that hold data used by ALU and are even faster than cache performs operations on data (e.g. addition, multiplication) J. Michael Moore

4 Processing Bits Boolean Logic Applied to circuits J. Michael Moore

5 Logical AND Truth table Truth table Logic gate X Y X AND Y False True
1 Logic gate J. Michael Moore

6 Logical AND: An Example
T F AND J. Michael Moore

7 Logical OR Truth table X Y X OR Y False True Truth table X Y X OR Y 1
1 Logic gate J. Michael Moore

8 Logical OR: An Example T F OR J. Michael Moore

9 Logical NOT Truth table X Not X False True Truth table X Not X 1
1 Logic gate J. Michael Moore

10 Logical NOT: An Example
F NOT J. Michael Moore

11 Logical NAND Truth table X Y X AND Y X NAND Y False True Truth table X
1 Logic gate J. Michael Moore

12 Logical NAND: An Example
T F AND NAND J. Michael Moore

13 Logical NOR Truth table X Y X OR Y X NOR Y False True Truth table X Y
1 Logic gate J. Michael Moore

14 Logical NOR: An Example
T F OR NOR J. Michael Moore

15 Logical Exclusive OR (XOR)
Truth table X Y X XOR Y False True Truth table X Y X XOR Y 1 Logic gate J. Michael Moore

16 Logical XOR: An Example
T F XOR J. Michael Moore

17 Adder Half Adder Full Adder Ripple Carry Adder J. Michael Moore

18 Memory Input Processor Output Storage J. Michael Moore

19 How a Program is Executed
Ex: to add the number held in address 3 and the number held in address 6 and put the result in address 10, the control unit copies data in main memory address 3 into register 1 LOAD 3, 1 copies data in main memory address 6 into register 4 LOAD 6, 4 tells ALU to add contents of registers 1 and 4 and put the result in register 3 ADD 1, 4, 3 copies data in register 3 into main memory address 10 STORE 3, 10 J. Michael Moore

20 How a Program is Executed
LOAD, ADD, and STORE are machine instructions operation: what action to do (e.g. ADD) operand: what is affected (e.g. register 3) How does the control unit know which instruction is next? The Program J. Michael Moore

21 How a Program is Stored Program: list of machine instructions using some agreed upon coding conventions. For example: first byte second byte instruction operation code first operand second operand third operand J. Michael Moore

22 How a Program is Stored Suppose the opcode for ADD is 0010
Then ADD 1, 4, 3 would be encoded as: Program is stored the same way data is stored. 1 first byte second byte instruction third operand second first operation code J. Michael Moore

23 How a Program is Executed
The control unit has instruction register: holds current instruction to be executed program counter: holds address of next instruction in the program to be fetched from memory J. Michael Moore

24 How a Program is Executed
Program counter tells where the computer is in the program. Usually, the next instruction to execute is the next instruction in memory. Sometimes we want to jump to another instruction (e.g., an ‘if’ statement or ‘while’ loop). More instructions: unconditional JUMP: always jump to the address given conditional JUMP: only jump if a certain condition is true (e.g., some register equals 0 or two registers equal each other) Instruction to stop executing instructions: HALT J. Michael Moore

25 Machine Cycle Fetch next instruction, as indicated by the program counter (PC), and increment the PC Decode the bit pattern in the instruction register (IR) - figure out which circuitry needs to be activated to perform the specified instruction Execute the specified instruction, by activating the ALU to do the right thing. If a JUMP, this may cause the PC to be altered Typical speeds: 10 to 100 million instructions per second (MIPS) J. Michael Moore

26 ... ... ... Architecture CPU Control Unit ALU R4 R3 R2 R1 IR PC BUS
First Instruction Second Instruction Third Instruction ... Data ... ... 1 2 3 4 Memory 95 96 97 98 99 J. Michael Moore

27 Assembly Language Example
PC: IR: R4: R3: R2: R1: Memory: ... 12-13: LOAD 108, 3 14-15: LOAD 109, 4 16-17: ADD 3, 4, 1 18-19: STORE 1, 110 20-21: HALT 108: 109: 110: 14 16 18 12 20 22 HALT STORE ADD LOAD LOAD 35 77 112 112 44 35 77 J. Michael Moore


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